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uboot-sunxi: bump to version 2024.01
This commit is contained in:
coolsnowwolf
parent
2923d86419
commit
6b306de18b
@ -7,14 +7,10 @@
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include $(TOPDIR)/rules.mk
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include $(TOPDIR)/rules.mk
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PKG_NAME:=arm-trusted-firmware-sunxi
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PKG_VERSION:=2.10
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PKG_RELEASE:=1
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PKG_RELEASE:=1
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PKG_SOURCE_PROTO:=git
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PKG_HASH:=88215a62291b9ba87da8e50b077741103cdc08fb6c9e1ebd34dfaace746d3201
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PKG_SOURCE_URL=https://github.com/ARM-software/arm-trusted-firmware
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PKG_SOURCE_DATE:=2020-11-17
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PKG_SOURCE_VERSION:=e2c509a39c6cc4dda8734e6509cdbe6e3603cdfc
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PKG_MIRROR_HASH:=b212d369a5286ebbf6a5616486efa05fa54d4294fd6e9ba2e54fdfae9eda918d
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PKG_LICENSE:=BSD-3-Clause
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PKG_LICENSE:=BSD-3-Clause
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PKG_LICENSE_FILES:=license.md
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PKG_LICENSE_FILES:=license.md
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@ -40,9 +36,15 @@ define Trusted-Firmware-A/sunxi-h6
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PLAT:=sun50i_h6
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PLAT:=sun50i_h6
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endef
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endef
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define Trusted-Firmware-A/sunxi-h616
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NAME:=Allwinner H616
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PLAT:=sun50i_h616
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endef
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TFA_TARGETS:= \
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TFA_TARGETS:= \
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sunxi-a64 \
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sunxi-a64 \
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sunxi-h6
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sunxi-h6 \
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sunxi-h616
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define Package/trusted-firmware-a/install
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define Package/trusted-firmware-a/install
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$(INSTALL_DIR) $(STAGING_DIR_IMAGE)
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$(INSTALL_DIR) $(STAGING_DIR_IMAGE)
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@ -9,9 +9,9 @@
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include $(TOPDIR)/rules.mk
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include $(TOPDIR)/rules.mk
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include $(INCLUDE_DIR)/kernel.mk
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include $(INCLUDE_DIR)/kernel.mk
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PKG_VERSION:=2020.04
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PKG_VERSION:=2024.01
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PKG_HASH:=fe732aaf037d9cc3c0909bad8362af366ae964bbdac6913a34081ff4ad565372
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PKG_HASH:=b99611f1ed237bf3541bdc8434b68c96a6e05967061f992443cb30aabebef5b3
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PKG_MAINTAINER:=Zoltan HERPAI <wigyori@uid0.hu>
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PKG_MAINTAINER:=Zoltan HERPAI <wigyori@uid0.hu>
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@ -116,8 +116,8 @@ endef
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define U-Boot/Marsboard_A10
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define U-Boot/Marsboard_A10
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BUILD_SUBTARGET:=cortexa8
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BUILD_SUBTARGET:=cortexa8
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NAME:=Marsboard
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NAME:=HAOYU Marsboard A10
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BUILD_DEVICES:=marsboard_a10-marsboard
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BUILD_DEVICES:=haoyu_a10-marsboard
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endef
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endef
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define U-Boot/Mele_M9
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define U-Boot/Mele_M9
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@ -270,6 +270,15 @@ define U-Boot/nanopi_neo2
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ATF:=a64
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ATF:=a64
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endef
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endef
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define U-Boot/nanopi_r1s_h5
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BUILD_SUBTARGET:=cortexa53
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NAME:=NanoPi R1S (H5)
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BUILD_DEVICES:=friendlyarm_nanopi-r1s-h5
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DEPENDS:=+PACKAGE_u-boot-nanopi_r1s_h5:trusted-firmware-a-sunxi-a64
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UENV:=a64
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ATF:=a64
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endef
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define U-Boot/pine64_plus
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define U-Boot/pine64_plus
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BUILD_SUBTARGET:=cortexa53
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BUILD_SUBTARGET:=cortexa53
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NAME:=Pine64 Plus A64
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NAME:=Pine64 Plus A64
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@ -285,6 +294,12 @@ define U-Boot/bananapi_m2_plus_h3
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BUILD_DEVICES:=sinovoip_bananapi-m2-plus
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BUILD_DEVICES:=sinovoip_bananapi-m2-plus
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endef
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endef
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define U-Boot/Sinovoip_BPI_M3
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BUILD_SUBTARGET:=cortexa7
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NAME:=Bananapi M3
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BUILD_DEVICES:=sinovoip_bananapi-m3
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endef
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define U-Boot/sopine_baseboard
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define U-Boot/sopine_baseboard
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BUILD_SUBTARGET:=cortexa53
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BUILD_SUBTARGET:=cortexa53
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NAME:=Sopine Baseboard
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NAME:=Sopine Baseboard
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@ -313,6 +328,15 @@ define U-Boot/orangepi_pc2
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ATF:=a64
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ATF:=a64
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endef
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endef
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define U-Boot/orangepi_zero2
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BUILD_SUBTARGET:=cortexa53
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NAME:=Xunlong Orange Pi Zero2
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BUILD_DEVICES:=xunlong_orangepi-zero2
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DEPENDS:=+PACKAGE_u-boot-orangepi_zero2:trusted-firmware-a-sunxi-h616
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UENV:=h616
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ATF:=h616
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endef
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define U-Boot/Bananapi_M2_Ultra
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define U-Boot/Bananapi_M2_Ultra
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BUILD_SUBTARGET:=cortexa7
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BUILD_SUBTARGET:=cortexa7
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NAME:=Bananapi M2 Ultra
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NAME:=Bananapi M2 Ultra
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@ -325,6 +349,13 @@ define U-Boot/bananapi_m2_berry
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BUILD_DEVICES:=sinovoip_bananapi-m2-berry
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BUILD_DEVICES:=sinovoip_bananapi-m2-berry
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endef
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endef
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define U-Boot/bananapi_p2_zero
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BUILD_SUBTARGET:=cortexa7
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NAME:=Bananapi P2 Zero
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BUILD_DEVICES:=sinovoip_bananapi-p2-zero
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endef
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UBOOT_TARGETS := \
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UBOOT_TARGETS := \
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a64-olinuxino \
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a64-olinuxino \
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a64-olinuxino-emmc \
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a64-olinuxino-emmc \
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@ -337,6 +368,7 @@ UBOOT_TARGETS := \
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bananapi_m2_plus_h3 \
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bananapi_m2_plus_h3 \
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Bananapi \
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Bananapi \
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bananapi_m2_berry \
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bananapi_m2_berry \
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bananapi_p2_zero \
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Bananapi_M2_Ultra \
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Bananapi_M2_Ultra \
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Bananapro \
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Bananapro \
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Cubieboard \
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Cubieboard \
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@ -357,6 +389,7 @@ UBOOT_TARGETS := \
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nanopi_neo_plus2 \
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nanopi_neo_plus2 \
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nanopi_neo2 \
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nanopi_neo2 \
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nanopi_r1 \
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nanopi_r1 \
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nanopi_r1s_h5 \
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orangepi_zero \
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orangepi_zero \
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orangepi_r1 \
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orangepi_r1 \
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orangepi_one \
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orangepi_one \
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@ -366,8 +399,10 @@ UBOOT_TARGETS := \
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orangepi_plus \
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orangepi_plus \
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orangepi_2 \
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orangepi_2 \
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orangepi_pc2 \
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orangepi_pc2 \
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orangepi_zero2 \
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pangolin \
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pangolin \
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pine64_plus \
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pine64_plus \
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Sinovoip_BPI_M3 \
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sopine_baseboard \
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sopine_baseboard \
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orangepi_zero_plus \
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orangepi_zero_plus \
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libretech_all_h3_cc_h5
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libretech_all_h3_cc_h5
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@ -375,7 +410,7 @@ UBOOT_TARGETS := \
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UBOOT_CONFIGURE_VARS += USE_PRIVATE_LIBGCC=yes
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UBOOT_CONFIGURE_VARS += USE_PRIVATE_LIBGCC=yes
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UBOOT_MAKE_FLAGS += \
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UBOOT_MAKE_FLAGS += \
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BL31=$(STAGING_DIR_IMAGE)/bl31_sunxi-$(ATF).bin
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BL31=$(STAGING_DIR_IMAGE)/bl31_sunxi-$(ATF).bin SCP=/dev/null
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define Build/InstallDev
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define Build/InstallDev
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$(INSTALL_DIR) $(STAGING_DIR_IMAGE)
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$(INSTALL_DIR) $(STAGING_DIR_IMAGE)
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@ -1,375 +0,0 @@
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--- a/arch/arm/dts/Makefile
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+++ b/arch/arm/dts/Makefile
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@@ -455,6 +455,7 @@ dtb-$(CONFIG_MACH_SUN6I) += \
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sun6i-a31-m9.dtb \
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sun6i-a31-mele-a1000g-quad.dtb \
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sun6i-a31-mixtile-loftq.dtb \
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+ sun6i-a31-pangolin.dtb \
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sun6i-a31s-colorfly-e708-q1.dtb \
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sun6i-a31s-cs908.dtb \
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sun6i-a31s-inet-q972.dtb \
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--- a/arch/arm/dts/sun6i-a31.dtsi
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+++ b/arch/arm/dts/sun6i-a31.dtsi
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@@ -641,6 +641,11 @@
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function = "lcd0";
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};
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+ i2c3_pins_a: i2c3@0 {
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+ allwinner,pins = "PB5", "PB6";
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+ allwinner,function = "i2c3";
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+ };
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+
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mmc0_pins_a: mmc0@0 {
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pins = "PF0", "PF1", "PF2",
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"PF3", "PF4", "PF5";
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--- /dev/null
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+++ b/arch/arm/dts/sun6i-a31-pangolin.dts
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@@ -0,0 +1,292 @@
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+/*
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+ * Copyright 2015, Theobroma Systems Design und Consulting GmbH
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+ *
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+ * This file is dual-licensed: you can use it either under the terms
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+ * of the GPL or the X11 license, at your option. Note that this dual
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+ * licensing only applies to this file, and not this project as a
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+ * whole.
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+ *
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+ * a) This file is free software; you can redistribute it and/or
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+ * modify it under the terms of the GNU General Public License as
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+ * published by the Free Software Foundation; either version 2 of the
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+ * License, or (at your option) any later version.
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+ *
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+ * This file is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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+ * GNU General Public License for more details.
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+ *
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+ * Or, alternatively,
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+ *
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+ * b) Permission is hereby granted, free of charge, to any person
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+ * obtaining a copy of this software and associated documentation
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+ * files (the "Software"), to deal in the Software without
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+ * restriction, including without limitation the rights to use,
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+ * copy, modify, merge, publish, distribute, sublicense, and/or
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+ * sell copies of the Software, and to permit persons to whom the
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+ * Software is furnished to do so, subject to the following
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+ * conditions:
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+ *
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+ * The above copyright notice and this permission notice shall be
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+ * included in all copies or substantial portions of the Software.
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+ *
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+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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+ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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+ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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+ * OTHER DEALINGS IN THE SOFTWARE.
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+ */
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+
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+/dts-v1/;
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+#include "sun6i-a31.dtsi"
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+#include "sunxi-common-regulators.dtsi"
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+
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+#include <dt-bindings/gpio/gpio.h>
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+#include <dt-bindings/pinctrl/sun4i-a10.h>
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+
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+/ {
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+ model = "Theobroma Systems A31 Pangolin";
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+ compatible = "tsd,a31-pangolin", "allwinner,sun6i-a31";
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+
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+ aliases {
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+ serial0 = &uart0;
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+ serial2 = &uart2;
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+ spi0 = &spi0;
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+ spi1 = &spi1;
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+ spi2 = &spi2;
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+ spi3 = &spi3;
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+ };
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+
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+ chosen {
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+ stdout-path = "serial2:115200n8";
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+ };
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+};
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+
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+&ehci0 {
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+ status = "okay";
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+};
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+
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+&ohci0 {
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+ status = "okay";
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+};
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+
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+&ehci1 {
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+ status = "okay";
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+};
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+
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+&ohci1 {
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+ status = "okay";
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+};
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+
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+&ohci2 {
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+ status = "okay";
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+};
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+
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+&gmac {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&gmac_pins_rgmii_a>;
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+ phy = <&phy1>;
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+ phy-mode = "rgmii";
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+ snps,reset-gpio = <&pio 0 7 GPIO_ACTIVE_LOW>;
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+ snps,reset-active-low;
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+ snps,reset-delays-us = <0 10000 30000>;
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+ status = "okay";
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+
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+ phy1: ethernet-phy@4 {
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+ reg = <4>;
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+ };
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+};
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+
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+&i2c0 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&i2c0_pins_a>;
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+ status = "okay";
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+};
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+
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+&i2c1 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&i2c1_pins_a>;
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+ status = "okay";
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+};
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+
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+&i2c2 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&i2c2_pins_a>;
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+ status = "okay";
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+};
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+
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+&i2c3 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&i2c3_pins_a>;
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+ status = "okay";
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+
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+ rtc_twi: rtc@6f {
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+ compatible = "isil,isl1208";
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+ reg = <0x6f>;
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+ };
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+ fan: fan@18 {
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+ compatible = "ti,amc6821";
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+ reg = <0x18>;
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+ cooling-min-state = <0>;
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+ cooling-max-state = <9>;
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+ #cooling-cells = <2>;
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+ };
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+};
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+
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+&spi0 {
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+ status = "okay";
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+
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+ flash: flash@0 {
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+ compatible = "spansion,m25p40";
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+ spi-max-frequency = <16000000>;
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+ spi-cpol;
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+ spi-cpha;
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+ };
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+};
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+
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+&spi1 {
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+ status = "okay";
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+};
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+
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+&ir {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&ir_pins_a>;
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+ status = "okay";
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+};
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+
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+&mmc0 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin_pangolin>;
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+ vmmc-supply = <®_vcc3v0>;
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|
||||||
+ bus-width = <4>;
|
|
||||||
+ cd-gpios = <&pio 2 19 GPIO_ACTIVE_LOW>; /* PC19 */
|
|
||||||
+ status = "okay";
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+&mmc0_pins_a {
|
|
||||||
+ /* external pull-ups missing for some pins */
|
|
||||||
+ allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+&mmc2 {
|
|
||||||
+ pinctrl-names = "default";
|
|
||||||
+ pinctrl-0 = <&mmc2_pins_a>;
|
|
||||||
+ vmmc-supply = <®_vcc3v0>;
|
|
||||||
+ bus-width = <8>;
|
|
||||||
+ non-removable;
|
|
||||||
+ status = "okay";
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+&pio {
|
|
||||||
+ mmc0_cd_pin_pangolin: mmc0_cd_pin@0 {
|
|
||||||
+ allwinner,pins = "PC19";
|
|
||||||
+ allwinner,function = "gpio_in";
|
|
||||||
+ allwinner,drive = <SUN4I_PINCTRL_10_MA>;
|
|
||||||
+ allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
|
|
||||||
+ };
|
|
||||||
+
|
|
||||||
+ leds_pins_pangolin: led_pins@0 {
|
|
||||||
+ allwinner,pins = "PH7", "PC16";
|
|
||||||
+ allwinner,function = "gpio_out";
|
|
||||||
+ allwinner,drive = <SUN4I_PINCTRL_20_MA>;
|
|
||||||
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
|
|
||||||
+ };
|
|
||||||
+
|
|
||||||
+ mmc2_pins_a: mmc2@0 {
|
|
||||||
+ allwinner,pins = "PC6","PC7","PC8","PC9","PC10","PC11",
|
|
||||||
+ "PC12","PC13","PC14","PC15";
|
|
||||||
+ allwinner,function = "mmc2";
|
|
||||||
+ allwinner,drive = <SUN4I_PINCTRL_30_MA>;
|
|
||||||
+ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
|
|
||||||
+ };
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+&p2wi {
|
|
||||||
+ status = "okay";
|
|
||||||
+
|
|
||||||
+ axp221: pmic@68 {
|
|
||||||
+ compatible = "x-powers,axp221";
|
|
||||||
+ reg = <0x68>;
|
|
||||||
+ interrupt-parent = <&nmi_intc>;
|
|
||||||
+ interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
|
|
||||||
+ interrupt-controller;
|
|
||||||
+ #interrupt-cells = <1>;
|
|
||||||
+ dcdc1-supply = <&vcc_3v0>;
|
|
||||||
+ dcdc5-supply = <&vcc_dram>;
|
|
||||||
+
|
|
||||||
+ regulators {
|
|
||||||
+ x-powers,dcdc-freq = <3000>;
|
|
||||||
+
|
|
||||||
+ vcc_3v0: dcdc1 {
|
|
||||||
+ regulator-always-on;
|
|
||||||
+ regulator-min-microvolt = <3000000>;
|
|
||||||
+ regulator-max-microvolt = <3000000>;
|
|
||||||
+ regulator-name = "vcc-3v0";
|
|
||||||
+ };
|
|
||||||
+
|
|
||||||
+ vdd_cpu: dcdc2 {
|
|
||||||
+ regulator-always-on;
|
|
||||||
+ regulator-min-microvolt = <700000>;
|
|
||||||
+ regulator-max-microvolt = <1320000>;
|
|
||||||
+ regulator-name = "vdd-cpu";
|
|
||||||
+ };
|
|
||||||
+
|
|
||||||
+ vdd_gpu: dcdc3 {
|
|
||||||
+ regulator-always-on;
|
|
||||||
+ regulator-min-microvolt = <700000>;
|
|
||||||
+ regulator-max-microvolt = <1320000>;
|
|
||||||
+ regulator-name = "vdd-gpu";
|
|
||||||
+ };
|
|
||||||
+
|
|
||||||
+ vdd_sys_dll: dcdc4 {
|
|
||||||
+ regulator-always-on;
|
|
||||||
+ regulator-min-microvolt = <1100000>;
|
|
||||||
+ regulator-max-microvolt = <1100000>;
|
|
||||||
+ regulator-name = "vdd-sys-dll";
|
|
||||||
+ };
|
|
||||||
+
|
|
||||||
+ vcc_dram: dcdc5 {
|
|
||||||
+ regulator-always-on;
|
|
||||||
+ regulator-min-microvolt = <1500000>;
|
|
||||||
+ regulator-max-microvolt = <1500000>;
|
|
||||||
+ regulator-name = "vcc-dram";
|
|
||||||
+ };
|
|
||||||
+
|
|
||||||
+ vcc_wifi: aldo1 {
|
|
||||||
+ regulator-min-microvolt = <3300000>;
|
|
||||||
+ regulator-max-microvolt = <3300000>;
|
|
||||||
+ regulator-name = "vcc_wifi";
|
|
||||||
+ };
|
|
||||||
+
|
|
||||||
+ avcc: aldo3 {
|
|
||||||
+ regulator-always-on;
|
|
||||||
+ regulator-min-microvolt = <3000000>;
|
|
||||||
+ regulator-max-microvolt = <3000000>;
|
|
||||||
+ regulator-name = "avcc";
|
|
||||||
+ };
|
|
||||||
+ };
|
|
||||||
+ };
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+&uart0 {
|
|
||||||
+ pinctrl-names = "default";
|
|
||||||
+ pinctrl-0 = <&uart0_pins_a>;
|
|
||||||
+ status = "okay";
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+&usb1_vbus_pin_a {
|
|
||||||
+ allwinner,pins = "PD23";
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+®_usb1_vbus {
|
|
||||||
+ gpio = <&pio 3 23 GPIO_ACTIVE_HIGH>; /* PD 23 */
|
|
||||||
+ status = "okay";
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+&usbphy {
|
|
||||||
+ status = "okay";
|
|
||||||
+ usb1_vbus-supply = <®_usb1_vbus>;
|
|
||||||
+};
|
|
||||||
--- /dev/null
|
|
||||||
+++ b/configs/pangolin_defconfig
|
|
||||||
@@ -0,0 +1,36 @@
|
|
||||||
+CONFIG_SUNXI_PANGOLIN=y
|
|
||||||
+CONFIG_SPL=y
|
|
||||||
+CONFIG_SYS_EXTRA_OPTIONS="USB_EHCI,SUNXI_GMAC,RGMII"
|
|
||||||
+CONFIG_DEFAULT_DEVICE_TREE="sun6i-a31-pangolin"
|
|
||||||
+CONFIG_VIDEO_VGA_VIA_LCD=y
|
|
||||||
+CONFIG_VIDEO_VGA_EXTERNAL_DAC_EN="PH25"
|
|
||||||
+CONFIG_ARM=y
|
|
||||||
+CONFIG_ARCH_SUNXI=y
|
|
||||||
+CONFIG_MACH_SUN6I=y
|
|
||||||
+CONFIG_DRAM_CHANNELS=1
|
|
||||||
+CONFIG_DRAM_CLK=360
|
|
||||||
+CONFIG_DRAM_ZQ=70
|
|
||||||
+CONFIG_AXP_DCDC1_VOLT=3300
|
|
||||||
+CONFIG_AXP_ALDO1_VOLT=0
|
|
||||||
+CONFIG_AXP_ALDO2_VOLT=1800
|
|
||||||
+CONFIG_AXP_ALDO3_VOLT=3000
|
|
||||||
+CONFIG_AXP_DLDO4_VOLT=3300
|
|
||||||
+CONFIG_AXP_ELDO1_VOLT=1200
|
|
||||||
+CONFIG_AXP_ELDO2_VOLT=2500
|
|
||||||
+CONFIG_AXP_ELDO3_VOLT=3300
|
|
||||||
+CONFIG_MMC_SUNXI_SLOT_EXTRA=2
|
|
||||||
+CONFIG_CONS_INDEX=3
|
|
||||||
+# Vbus gpio for usb1
|
|
||||||
+CONFIG_USB1_VBUS_PIN=""
|
|
||||||
+# No Vbus gpio for usb2
|
|
||||||
+CONFIG_USB2_VBUS_PIN=""
|
|
||||||
+CONFIG_USB=y
|
|
||||||
+CONFIG_DM_USB=y
|
|
||||||
+CONFIG_USB_EHCI=y
|
|
||||||
+CONFIG_USB_KEYBOARD=y
|
|
||||||
+CONFIG_DM_ETH=y
|
|
||||||
+CONFIG_CMD_IMLS=n
|
|
||||||
+CONFIG_ETH_DESIGNWARE=y
|
|
||||||
+CONFIG_DM_SPI=y
|
|
||||||
+CONFIG_DM_SPI_FLASH=y
|
|
||||||
+CONFIG_SUNXI_SPI=y
|
|
||||||
--- a/arch/arm/mach-sunxi/Kconfig
|
|
||||||
+++ b/arch/arm/mach-sunxi/Kconfig
|
|
||||||
@@ -896,6 +896,14 @@ config VIDEO_LCD_PANEL_I2C_SCL
|
|
||||||
Set the SCL pin for the LCD i2c interface. This takes a string in the
|
|
||||||
format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.
|
|
||||||
|
|
||||||
+choice
|
|
||||||
+ prompt "Sunxi Board Variant"
|
|
||||||
+ optional
|
|
||||||
+
|
|
||||||
+config SUNXI_PANGOLIN
|
|
||||||
+ bool "Theobroma A31 uQ7 Board"
|
|
||||||
+
|
|
||||||
+endchoice
|
|
||||||
|
|
||||||
# Note only one of these may be selected at a time! But hidden choices are
|
|
||||||
# not supported by Kconfig
|
|
||||||
@ -2,7 +2,7 @@
|
|||||||
|
|
||||||
--- a/configs/A20-OLinuXino-Lime2_defconfig
|
--- a/configs/A20-OLinuXino-Lime2_defconfig
|
||||||
+++ b/configs/A20-OLinuXino-Lime2_defconfig
|
+++ b/configs/A20-OLinuXino-Lime2_defconfig
|
||||||
@@ -22,6 +22,7 @@ CONFIG_ETH_DESIGNWARE=y
|
@@ -25,6 +25,7 @@ CONFIG_ETH_DESIGNWARE=y
|
||||||
CONFIG_RGMII=y
|
CONFIG_RGMII=y
|
||||||
CONFIG_MII=y
|
CONFIG_MII=y
|
||||||
CONFIG_SUN7I_GMAC=y
|
CONFIG_SUN7I_GMAC=y
|
||||||
|
|||||||
@ -1,44 +0,0 @@
|
|||||||
--- a/configs/A20-OLinuXino-Lime2-eMMC_defconfig
|
|
||||||
+++ b/configs/A20-OLinuXino-Lime2-eMMC_defconfig
|
|
||||||
@@ -8,6 +8,8 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2
|
|
||||||
CONFIG_USB0_VBUS_PIN="PC17"
|
|
||||||
CONFIG_USB0_VBUS_DET="PH5"
|
|
||||||
CONFIG_I2C1_ENABLE=y
|
|
||||||
+CONFIG_PHY_MICREL=y
|
|
||||||
+CONFIG_PHY_MICREL_KSZ90X1=y
|
|
||||||
CONFIG_SATAPWR="PC3"
|
|
||||||
CONFIG_SPL_SPI_SUNXI=y
|
|
||||||
CONFIG_AHCI=y
|
|
||||||
--- a/configs/A20-OLinuXino-Lime2_defconfig
|
|
||||||
+++ b/configs/A20-OLinuXino-Lime2_defconfig
|
|
||||||
@@ -7,6 +7,8 @@ CONFIG_MMC0_CD_PIN="PH1"
|
|
||||||
CONFIG_USB0_VBUS_PIN="PC17"
|
|
||||||
CONFIG_USB0_VBUS_DET="PH5"
|
|
||||||
CONFIG_I2C1_ENABLE=y
|
|
||||||
+CONFIG_PHY_MICREL=y
|
|
||||||
+CONFIG_PHY_MICREL_KSZ90X1=y
|
|
||||||
CONFIG_SATAPWR="PC3"
|
|
||||||
CONFIG_AHCI=y
|
|
||||||
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
|
|
||||||
--- a/drivers/net/phy/micrel_ksz90x1.c
|
|
||||||
+++ b/drivers/net/phy/micrel_ksz90x1.c
|
|
||||||
@@ -14,6 +14,8 @@
|
|
||||||
#include <errno.h>
|
|
||||||
#include <micrel.h>
|
|
||||||
#include <phy.h>
|
|
||||||
+#include <asm/io.h>
|
|
||||||
+#include <asm/arch/clock.h>
|
|
||||||
|
|
||||||
/*
|
|
||||||
* KSZ9021 - KSZ9031 common
|
|
||||||
@@ -344,6 +346,10 @@ static int ksz9031_phy_extwrite(struct p
|
|
||||||
static int ksz9031_config(struct phy_device *phydev)
|
|
||||||
{
|
|
||||||
int ret;
|
|
||||||
+ struct sunxi_ccm_reg *const ccm =
|
|
||||||
+ (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
|
|
||||||
+
|
|
||||||
+ setbits_le32(&ccm->gmac_clk_cfg, CCM_GMAC_CTRL_TX_CLK_DELAY(4));
|
|
||||||
|
|
||||||
ret = ksz9031_of_config(phydev);
|
|
||||||
if (ret)
|
|
||||||
@ -14,7 +14,7 @@ More specifically, the following settings are now used:
|
|||||||
|
|
||||||
--- a/arch/arm/mach-sunxi/clock_sun6i.c
|
--- a/arch/arm/mach-sunxi/clock_sun6i.c
|
||||||
+++ b/arch/arm/mach-sunxi/clock_sun6i.c
|
+++ b/arch/arm/mach-sunxi/clock_sun6i.c
|
||||||
@@ -112,11 +112,12 @@ void clock_set_pll1(unsigned int clk)
|
@@ -131,11 +131,12 @@ void clock_set_pll1(unsigned int clk)
|
||||||
struct sunxi_ccm_reg * const ccm =
|
struct sunxi_ccm_reg * const ccm =
|
||||||
(struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
|
(struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
|
||||||
const int p = 0;
|
const int p = 0;
|
||||||
|
|||||||
@ -18,7 +18,7 @@ required setting for the PLL LDO is 1.37v as per the A31 manual.
|
|||||||
|
|
||||||
--- a/arch/arm/mach-sunxi/clock_sun6i.c
|
--- a/arch/arm/mach-sunxi/clock_sun6i.c
|
||||||
+++ b/arch/arm/mach-sunxi/clock_sun6i.c
|
+++ b/arch/arm/mach-sunxi/clock_sun6i.c
|
||||||
@@ -25,13 +25,26 @@ void clock_init_safe(void)
|
@@ -28,13 +28,26 @@ void clock_init_safe(void)
|
||||||
struct sunxi_prcm_reg * const prcm =
|
struct sunxi_prcm_reg * const prcm =
|
||||||
(struct sunxi_prcm_reg *)SUNXI_PRCM_BASE;
|
(struct sunxi_prcm_reg *)SUNXI_PRCM_BASE;
|
||||||
|
|
||||||
@ -47,8 +47,8 @@ required setting for the PLL LDO is 1.37v as per the A31 manual.
|
|||||||
#endif
|
#endif
|
||||||
|
|
||||||
#if defined(CONFIG_MACH_SUN8I_R40) || defined(CONFIG_MACH_SUN50I)
|
#if defined(CONFIG_MACH_SUN8I_R40) || defined(CONFIG_MACH_SUN50I)
|
||||||
--- a/arch/arm/include/asm/arch-sunxi/prcm.h
|
--- a/arch/arm/include/asm/arch-sunxi/prcm_sun6i.h
|
||||||
+++ b/arch/arm/include/asm/arch-sunxi/prcm.h
|
+++ b/arch/arm/include/asm/arch-sunxi/prcm_sun6i.h
|
||||||
@@ -110,13 +110,13 @@
|
@@ -110,13 +110,13 @@
|
||||||
#define PRCM_PLL_CTRL_LDO_OUT_MASK \
|
#define PRCM_PLL_CTRL_LDO_OUT_MASK \
|
||||||
__PRCM_PLL_CTRL_LDO_OUT(0x7)
|
__PRCM_PLL_CTRL_LDO_OUT(0x7)
|
||||||
|
|||||||
@ -1,16 +0,0 @@
|
|||||||
From d7311b6e7cdd1fc0e92665188e650934718cb2b1 Mon Sep 17 00:00:00 2001
|
|
||||||
From: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
|
||||||
Date: Tue, 16 Jun 2015 10:52:01 +0200
|
|
||||||
Subject: sun6i: define alternate-function for UART2 on GPG
|
|
||||||
|
|
||||||
|
|
||||||
--- a/arch/arm/include/asm/arch-sunxi/gpio.h
|
|
||||||
+++ b/arch/arm/include/asm/arch-sunxi/gpio.h
|
|
||||||
@@ -190,6 +190,7 @@ enum sunxi_gpio_number {
|
|
||||||
#define SUN6I_GPG_SDC1 2
|
|
||||||
#define SUN8I_GPG_SDC1 2
|
|
||||||
#define SUN6I_GPG_TWI3 2
|
|
||||||
+#define SUN6I_GPG_UART2 2
|
|
||||||
#define SUN5I_GPG_UART1 4
|
|
||||||
|
|
||||||
#define SUN6I_GPH_PWM 2
|
|
||||||
@ -1,30 +0,0 @@
|
|||||||
From c058dfb69136d62f88ae8b121104bdb7ce2df03f Mon Sep 17 00:00:00 2001
|
|
||||||
From: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
|
||||||
Date: Tue, 16 Jun 2015 10:53:11 +0200
|
|
||||||
Subject: ARM: sun6i: Support console on UART2 (GPG6/GPG7)
|
|
||||||
|
|
||||||
|
|
||||||
--- a/arch/arm/mach-sunxi/board.c
|
|
||||||
+++ b/arch/arm/mach-sunxi/board.c
|
|
||||||
@@ -129,6 +129,10 @@ static int gpio_init(void)
|
|
||||||
sunxi_gpio_set_cfgpin(SUNXI_GPG(3), SUN5I_GPG_UART1);
|
|
||||||
sunxi_gpio_set_cfgpin(SUNXI_GPG(4), SUN5I_GPG_UART1);
|
|
||||||
sunxi_gpio_set_pull(SUNXI_GPG(4), SUNXI_GPIO_PULL_UP);
|
|
||||||
+#elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN6I)
|
|
||||||
+ sunxi_gpio_set_cfgpin(SUNXI_GPG(6), SUN6I_GPG_UART2);
|
|
||||||
+ sunxi_gpio_set_cfgpin(SUNXI_GPG(7), SUN6I_GPG_UART2);
|
|
||||||
+ sunxi_gpio_set_pull(SUNXI_GPG(7), SUNXI_GPIO_PULL_UP);
|
|
||||||
#elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I)
|
|
||||||
sunxi_gpio_set_cfgpin(SUNXI_GPB(0), SUN8I_GPB_UART2);
|
|
||||||
sunxi_gpio_set_cfgpin(SUNXI_GPB(1), SUN8I_GPB_UART2);
|
|
||||||
--- a/include/configs/sunxi-common.h
|
|
||||||
+++ b/include/configs/sunxi-common.h
|
|
||||||
@@ -244,6 +244,8 @@ extern int soft_i2c_gpio_scl;
|
|
||||||
#endif
|
|
||||||
#elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I)
|
|
||||||
#define OF_STDOUT_PATH "/soc@01c00000/serial@01c28400:115200"
|
|
||||||
+#elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN6I)
|
|
||||||
+#define OF_STDOUT_PATH "/soc@01c00000/serial@01c28800:115200"
|
|
||||||
#elif CONFIG_CONS_INDEX == 3 && defined(CONFIG_MACH_SUN8I)
|
|
||||||
#define OF_STDOUT_PATH "/soc@01c00000/serial@01c28800:115200"
|
|
||||||
#elif CONFIG_CONS_INDEX == 5 && defined(CONFIG_MACH_SUN8I)
|
|
||||||
@ -1,23 +0,0 @@
|
|||||||
From 78d5fab8e345b1273ec8c22d06f1a1d27670b518 Mon Sep 17 00:00:00 2001
|
|
||||||
From: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
|
|
||||||
Date: Tue, 16 Jun 2015 10:59:38 +0200
|
|
||||||
Subject: ARM: sunxi: Make CONS_INDEX configurable
|
|
||||||
|
|
||||||
|
|
||||||
--- a/arch/arm/mach-sunxi/Kconfig
|
|
||||||
+++ b/arch/arm/mach-sunxi/Kconfig
|
|
||||||
@@ -559,6 +559,14 @@ config SYS_BOARD
|
|
||||||
config SYS_SOC
|
|
||||||
default "sunxi"
|
|
||||||
|
|
||||||
+config CONS_INDEX
|
|
||||||
+ int "UART used for console"
|
|
||||||
+ range 1 5
|
|
||||||
+ default 1
|
|
||||||
+ ---help---
|
|
||||||
+ Defines the UART port used for serial output. It starts at 1 so UART0 is 1,
|
|
||||||
+ UART1 is 2 and so on.
|
|
||||||
+
|
|
||||||
config UART0_PORT_F
|
|
||||||
bool "UART0 on MicroSD breakout board"
|
|
||||||
default n
|
|
||||||
@ -17,7 +17,7 @@ Cc: Simon Glass <sjg@chromium.org>
|
|||||||
|
|
||||||
--- a/tools/fit_image.c
|
--- a/tools/fit_image.c
|
||||||
+++ b/tools/fit_image.c
|
+++ b/tools/fit_image.c
|
||||||
@@ -726,9 +726,14 @@ static int fit_handle_file(struct image_
|
@@ -774,9 +774,14 @@ static int fit_handle_file(struct image_
|
||||||
}
|
}
|
||||||
*cmd = '\0';
|
*cmd = '\0';
|
||||||
} else if (params->datafile) {
|
} else if (params->datafile) {
|
||||||
|
|||||||
@ -1,37 +0,0 @@
|
|||||||
From def280c4792262a368c8861312dc6b376181021f Mon Sep 17 00:00:00 2001
|
|
||||||
From: Hauke Mehrtens <hauke@hauke-m.de>
|
|
||||||
Date: Mon, 1 Jan 2018 23:10:56 +0100
|
|
||||||
Subject: sunxi: deactivate binman
|
|
||||||
|
|
||||||
Use the old way to generate the images instead of binman.
|
|
||||||
binman needs python with swig to avoid this host tool dependency use the
|
|
||||||
old way of generating images.
|
|
||||||
---
|
|
||||||
Makefile | 7 ++++---
|
|
||||||
1 file changed, 4 insertions(+), 3 deletions(-)
|
|
||||||
|
|
||||||
--- a/Makefile
|
|
||||||
+++ b/Makefile
|
|
||||||
@@ -1555,8 +1555,10 @@ endif
|
|
||||||
|
|
||||||
ifneq ($(CONFIG_ARCH_SUNXI),)
|
|
||||||
ifeq ($(CONFIG_ARM64),)
|
|
||||||
-u-boot-sunxi-with-spl.bin: spl/sunxi-spl.bin u-boot.img u-boot.dtb FORCE
|
|
||||||
- $(call if_changed,binman)
|
|
||||||
+OBJCOPYFLAGS_u-boot-sunxi-with-spl.bin = -I binary -O binary \
|
|
||||||
+ --pad-to=$(CONFIG_SPL_PAD_TO) --gap-fill=0xff
|
|
||||||
+u-boot-sunxi-with-spl.bin: spl/sunxi-spl.bin u-boot.img FORCE
|
|
||||||
+ $(call if_changed,pad_cat)
|
|
||||||
else
|
|
||||||
u-boot-sunxi-with-spl.bin: spl/sunxi-spl.bin u-boot.itb FORCE
|
|
||||||
$(call if_changed,cat)
|
|
||||||
--- a/arch/arm/Kconfig
|
|
||||||
+++ b/arch/arm/Kconfig
|
|
||||||
@@ -962,7 +962,6 @@ config ARCH_SOCFPGA
|
|
||||||
|
|
||||||
config ARCH_SUNXI
|
|
||||||
bool "Support sunxi (Allwinner) SoCs"
|
|
||||||
- select BINMAN
|
|
||||||
select CMD_GPIO
|
|
||||||
select CMD_MMC if MMC
|
|
||||||
select CMD_USB if DISTRO_DEFAULTS
|
|
||||||
@ -1,19 +0,0 @@
|
|||||||
--- a/configs/A13-OLinuXino_defconfig
|
|
||||||
+++ b/configs/A13-OLinuXino_defconfig
|
|
||||||
@@ -7,7 +7,6 @@ CONFIG_DRAM_EMR1=0
|
|
||||||
CONFIG_MMC0_CD_PIN="PG0"
|
|
||||||
CONFIG_USB0_VBUS_DET="PG1"
|
|
||||||
CONFIG_USB1_VBUS_PIN="PG11"
|
|
||||||
-CONFIG_AXP_GPIO=y
|
|
||||||
# CONFIG_VIDEO_HDMI is not set
|
|
||||||
CONFIG_VIDEO_VGA_VIA_LCD=y
|
|
||||||
CONFIG_VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH=y
|
|
||||||
@@ -21,7 +20,7 @@ CONFIG_CMD_USB_MASS_STORAGE=y
|
|
||||||
CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-olinuxino"
|
|
||||||
CONFIG_DFU_RAM=y
|
|
||||||
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
|
|
||||||
-CONFIG_AXP_ALDO3_VOLT=3300
|
|
||||||
+CONFIG_SUNXI_NO_PMIC=y
|
|
||||||
CONFIG_CONS_INDEX=2
|
|
||||||
CONFIG_USB_EHCI_HCD=y
|
|
||||||
CONFIG_USB_OHCI_HCD=y
|
|
||||||
@ -1,81 +0,0 @@
|
|||||||
--- a/arch/arm/dts/Makefile
|
|
||||||
+++ b/arch/arm/dts/Makefile
|
|
||||||
@@ -539,7 +539,8 @@ dtb-$(CONFIG_MACH_SUN8I_H3) += \
|
|
||||||
sun8i-h3-orangepi-plus.dtb \
|
|
||||||
sun8i-h3-orangepi-plus2e.dtb \
|
|
||||||
sun8i-h3-orangepi-zero-plus2.dtb \
|
|
||||||
- sun8i-h3-rervision-dvk.dtb
|
|
||||||
+ sun8i-h3-rervision-dvk.dtb \
|
|
||||||
+ sun8i-h3-zeropi.dtb
|
|
||||||
dtb-$(CONFIG_MACH_SUN8I_R40) += \
|
|
||||||
sun8i-r40-bananapi-m2-ultra.dtb \
|
|
||||||
sun8i-v40-bananapi-m2-berry.dtb
|
|
||||||
--- /dev/null
|
|
||||||
+++ b/arch/arm/dts/sun8i-h3-zeropi.dts
|
|
||||||
@@ -0,0 +1,66 @@
|
|
||||||
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
|
||||||
+
|
|
||||||
+#include "sun8i-h3-nanopi.dtsi"
|
|
||||||
+
|
|
||||||
+/ {
|
|
||||||
+ model = "FriendlyElec ZeroPi";
|
|
||||||
+ compatible = "friendlyarm,zeropi", "allwinner,sun8i-h3";
|
|
||||||
+
|
|
||||||
+ aliases {
|
|
||||||
+ ethernet0 = &emac;
|
|
||||||
+ };
|
|
||||||
+
|
|
||||||
+ reg_gmac_3v3: gmac-3v3 {
|
|
||||||
+ compatible = "regulator-fixed";
|
|
||||||
+ pinctrl-names = "default";
|
|
||||||
+ pinctrl-0 = <&gmac_power_pin_nanopi>;
|
|
||||||
+ regulator-name = "gmac-3v3";
|
|
||||||
+ regulator-min-microvolt = <3300000>;
|
|
||||||
+ regulator-max-microvolt = <3300000>;
|
|
||||||
+ startup-delay-us = <100000>;
|
|
||||||
+ enable-active-high;
|
|
||||||
+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
|
|
||||||
+ };
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+&ehci0 {
|
|
||||||
+ status = "okay";
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+&ohci0 {
|
|
||||||
+ status = "okay";
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+&pio {
|
|
||||||
+ gmac_power_pin_nanopi: gmac_power_pin@0 {
|
|
||||||
+ pins = "PD6";
|
|
||||||
+ function = "gpio_out";
|
|
||||||
+ };
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+&external_mdio {
|
|
||||||
+ ext_rgmii_phy: ethernet-phy@1 {
|
|
||||||
+ compatible = "ethernet-phy-ieee802.3-c22";
|
|
||||||
+ reg = <7>;
|
|
||||||
+ };
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+&emac {
|
|
||||||
+ pinctrl-names = "default";
|
|
||||||
+ pinctrl-0 = <&emac_rgmii_pins>;
|
|
||||||
+ phy-supply = <®_gmac_3v3>;
|
|
||||||
+ phy-handle = <&ext_rgmii_phy>;
|
|
||||||
+ phy-mode = "rgmii";
|
|
||||||
+
|
|
||||||
+ allwinner,leds-active-low;
|
|
||||||
+ status = "okay";
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+&usb_otg {
|
|
||||||
+ status = "okay";
|
|
||||||
+ dr_mode = "peripheral";
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+&usbphy {
|
|
||||||
+ usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
|
|
||||||
+};
|
|
||||||
@ -1,24 +0,0 @@
|
|||||||
--- /dev/null
|
|
||||||
+++ b/configs/zeropi_defconfig
|
|
||||||
@@ -0,0 +1,21 @@
|
|
||||||
+CONFIG_ARM=y
|
|
||||||
+CONFIG_ARCH_SUNXI=y
|
|
||||||
+CONFIG_MACH_SUN8I_H3=y
|
|
||||||
+CONFIG_DRAM_CLK=408
|
|
||||||
+CONFIG_DRAM_ZQ=3881979
|
|
||||||
+CONFIG_DRAM_ODT_EN=y
|
|
||||||
+CONFIG_MACPWR="PD6"
|
|
||||||
+# CONFIG_VIDEO_DE2 is not set
|
|
||||||
+CONFIG_NR_DRAM_BANKS=1
|
|
||||||
+CONFIG_DEFAULT_DEVICE_TREE="sun8i-h3-zeropi"
|
|
||||||
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
|
|
||||||
+CONFIG_CONSOLE_MUX=y
|
|
||||||
+CONFIG_SPL=y
|
|
||||||
+CONFIG_SYS_CLK_FREQ=480000000
|
|
||||||
+# CONFIG_CMD_IMLS is not set
|
|
||||||
+# CONFIG_CMD_FLASH is not set
|
|
||||||
+# CONFIG_CMD_FPGA is not set
|
|
||||||
+CONFIG_SUN8I_EMAC=y
|
|
||||||
+CONFIG_USB_EHCI_HCD=y
|
|
||||||
+CONFIG_USB_EHCI_HCD=y
|
|
||||||
+CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y
|
|
||||||
@ -12,168 +12,9 @@ Signed-off-by: Jayantajit Gogoi <jayanta.gogoi525@gmail.com>
|
|||||||
create mode 100644 arch/arm/dts/sun8i-h3-nanopi-r1.dts
|
create mode 100644 arch/arm/dts/sun8i-h3-nanopi-r1.dts
|
||||||
create mode 100644 configs/nanopi_r1_defconfig
|
create mode 100644 configs/nanopi_r1_defconfig
|
||||||
|
|
||||||
--- a/arch/arm/dts/Makefile
|
|
||||||
+++ b/arch/arm/dts/Makefile
|
|
||||||
@@ -531,6 +531,7 @@ dtb-$(CONFIG_MACH_SUN8I_H3) += \
|
|
||||||
sun8i-h3-nanopi-m1-plus.dtb \
|
|
||||||
sun8i-h3-nanopi-neo.dtb \
|
|
||||||
sun8i-h3-nanopi-neo-air.dtb \
|
|
||||||
+ sun8i-h3-nanopi-r1.dtb \
|
|
||||||
sun8i-h3-orangepi-2.dtb \
|
|
||||||
sun8i-h3-orangepi-lite.dtb \
|
|
||||||
sun8i-h3-orangepi-one.dtb \
|
|
||||||
--- /dev/null
|
|
||||||
+++ b/arch/arm/dts/sun8i-h3-nanopi-r1.dts
|
|
||||||
@@ -0,0 +1,146 @@
|
|
||||||
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
|
||||||
+/*
|
|
||||||
+ * Copyright (C) 2019 Igor Pecovnik <igor@armbian.com>
|
|
||||||
+ * Copyright (C) 2020 Jayantajit Gogoi <jayanta.gogoi525@gmail.com>
|
|
||||||
+ */
|
|
||||||
+
|
|
||||||
+/* NanoPi R1 is based on the NanoPi-H3 design from FriendlyARM */
|
|
||||||
+#include "sun8i-h3-nanopi.dtsi"
|
|
||||||
+
|
|
||||||
+/ {
|
|
||||||
+ model = "FriendlyARM NanoPi R1";
|
|
||||||
+ compatible = "friendlyarm,nanopi-r1", "allwinner,sun8i-h3";
|
|
||||||
+
|
|
||||||
+ reg_gmac_3v3: gmac-3v3 {
|
|
||||||
+ compatible = "regulator-fixed";
|
|
||||||
+ regulator-name = "gmac-3v3";
|
|
||||||
+ regulator-min-microvolt = <3300000>;
|
|
||||||
+ regulator-max-microvolt = <3300000>;
|
|
||||||
+ startup-delay-us = <100000>;
|
|
||||||
+ enable-active-high;
|
|
||||||
+ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
|
|
||||||
+ };
|
|
||||||
+
|
|
||||||
+ vdd_cpux: gpio-regulator {
|
|
||||||
+ compatible = "regulator-gpio";
|
|
||||||
+ pinctrl-names = "default";
|
|
||||||
+ regulator-name = "vdd-cpux";
|
|
||||||
+ regulator-type = "voltage";
|
|
||||||
+ regulator-boot-on;
|
|
||||||
+ regulator-always-on;
|
|
||||||
+ regulator-min-microvolt = <1100000>;
|
|
||||||
+ regulator-max-microvolt = <1300000>;
|
|
||||||
+ regulator-ramp-delay = <50>;
|
|
||||||
+ gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>;
|
|
||||||
+ gpios-states = <0x1>;
|
|
||||||
+ states = <1100000 0x0
|
|
||||||
+ 1300000 0x1>;
|
|
||||||
+ };
|
|
||||||
+
|
|
||||||
+ wifi_pwrseq: wifi_pwrseq {
|
|
||||||
+ compatible = "mmc-pwrseq-simple";
|
|
||||||
+ pinctrl-names = "default";
|
|
||||||
+ reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>;
|
|
||||||
+ };
|
|
||||||
+
|
|
||||||
+ leds {
|
|
||||||
+ /delete-node/ pwr;
|
|
||||||
+ status {
|
|
||||||
+ label = "nanopi:red:status";
|
|
||||||
+ gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>;
|
|
||||||
+ linux,default-trigger = "heartbeat";
|
|
||||||
+ };
|
|
||||||
+
|
|
||||||
+ wan {
|
|
||||||
+ label = "nanopi:green:wan";
|
|
||||||
+ gpios = <&pio 6 11 GPIO_ACTIVE_HIGH>;
|
|
||||||
+ };
|
|
||||||
+
|
|
||||||
+ lan {
|
|
||||||
+ label = "nanopi:green:lan";
|
|
||||||
+ gpios = <&pio 0 9 GPIO_ACTIVE_HIGH>;
|
|
||||||
+ };
|
|
||||||
+ };
|
|
||||||
+
|
|
||||||
+ r_gpio_keys {
|
|
||||||
+ pinctrl-names = "default";
|
|
||||||
+ pinctrl-0 = <&sw_r_npi>;
|
|
||||||
+
|
|
||||||
+ /delete-node/ k1;
|
|
||||||
+ reset {
|
|
||||||
+ label = "reset";
|
|
||||||
+ linux,code = <KEY_RESTART>;
|
|
||||||
+ gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;
|
|
||||||
+ };
|
|
||||||
+ };
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+&cpu0 {
|
|
||||||
+ cpu-supply = <&vdd_cpux>;
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+&ehci1 {
|
|
||||||
+ status = "okay";
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+&ehci2 {
|
|
||||||
+ status = "okay";
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+&emac {
|
|
||||||
+ pinctrl-names = "default";
|
|
||||||
+ pinctrl-0 = <&emac_rgmii_pins>;
|
|
||||||
+ phy-supply = <®_gmac_3v3>;
|
|
||||||
+ phy-handle = <&ext_rgmii_phy>;
|
|
||||||
+ phy-mode = "rgmii";
|
|
||||||
+ status = "okay";
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+&external_mdio {
|
|
||||||
+ ext_rgmii_phy: ethernet-phy@1 {
|
|
||||||
+ compatible = "ethernet-phy-ieee802.3-c22";
|
|
||||||
+ reg = <7>;
|
|
||||||
+ };
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+&mmc1 {
|
|
||||||
+ vmmc-supply = <®_vcc3v3>;
|
|
||||||
+ vqmmc-supply = <®_vcc3v3>;
|
|
||||||
+ mmc-pwrseq = <&wifi_pwrseq>;
|
|
||||||
+ bus-width = <4>;
|
|
||||||
+ non-removable;
|
|
||||||
+ status = "okay";
|
|
||||||
+
|
|
||||||
+ sdio_wifi: sdio_wifi@1 {
|
|
||||||
+ reg = <1>;
|
|
||||||
+ compatible = "brcm,bcm4329-fmac";
|
|
||||||
+ interrupt-parent = <&pio>;
|
|
||||||
+ interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>;
|
|
||||||
+ interrupt-names = "host-wake";
|
|
||||||
+ };
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+&mmc2 {
|
|
||||||
+ pinctrl-names = "default";
|
|
||||||
+ pinctrl-0 = <&mmc2_8bit_pins>;
|
|
||||||
+ vmmc-supply = <®_vcc3v3>;
|
|
||||||
+ vqmmc-supply = <®_vcc3v3>;
|
|
||||||
+ bus-width = <8>;
|
|
||||||
+ non-removable;
|
|
||||||
+ status = "okay";
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+&ohci1 {
|
|
||||||
+ status = "okay";
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+&ohci2 {
|
|
||||||
+ status = "okay";
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
+&r_pio {
|
|
||||||
+ sw_r_npi: key_pins {
|
|
||||||
+ pins = "PL3";
|
|
||||||
+ function = "gpio_in";
|
|
||||||
+ };
|
|
||||||
+};
|
|
||||||
--- /dev/null
|
--- /dev/null
|
||||||
+++ b/configs/nanopi_r1_defconfig
|
+++ b/configs/nanopi_r1_defconfig
|
||||||
@@ -0,0 +1,22 @@
|
@@ -0,0 +1,21 @@
|
||||||
+CONFIG_ARM=y
|
+CONFIG_ARM=y
|
||||||
+CONFIG_ARCH_SUNXI=y
|
+CONFIG_ARCH_SUNXI=y
|
||||||
+CONFIG_SPL=y
|
+CONFIG_SPL=y
|
||||||
@ -186,7 +27,6 @@ Signed-off-by: Jayantajit Gogoi <jayanta.gogoi525@gmail.com>
|
|||||||
+CONFIG_NR_DRAM_BANKS=1
|
+CONFIG_NR_DRAM_BANKS=1
|
||||||
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
|
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
|
||||||
+CONFIG_CONSOLE_MUX=y
|
+CONFIG_CONSOLE_MUX=y
|
||||||
+CONFIG_SYS_CLK_FREQ=480000000
|
|
||||||
+# CONFIG_CMD_FLASH is not set
|
+# CONFIG_CMD_FLASH is not set
|
||||||
+# CONFIG_SPL_DOS_PARTITION is not set
|
+# CONFIG_SPL_DOS_PARTITION is not set
|
||||||
+# CONFIG_SPL_EFI_PARTITION is not set
|
+# CONFIG_SPL_EFI_PARTITION is not set
|
||||||
|
|||||||
@ -0,0 +1,307 @@
|
|||||||
|
--- /dev/null
|
||||||
|
+++ b/arch/arm/dts/sun8i-h2-plus-bananapi-p2-zero.dts
|
||||||
|
@@ -0,0 +1,291 @@
|
||||||
|
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||||
|
+/*
|
||||||
|
+ * Copyright (C) 2023 Zoltan HERPAI <wigyori@uid0.hu>
|
||||||
|
+ *
|
||||||
|
+ * Based on sun8i-h2-plus-bananapi-m2-zero.dts, which is:
|
||||||
|
+ * Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io>
|
||||||
|
+ */
|
||||||
|
+
|
||||||
|
+/dts-v1/;
|
||||||
|
+#include "sun8i-h3.dtsi"
|
||||||
|
+#include "sunxi-common-regulators.dtsi"
|
||||||
|
+
|
||||||
|
+#include <dt-bindings/gpio/gpio.h>
|
||||||
|
+#include <dt-bindings/input/input.h>
|
||||||
|
+
|
||||||
|
+/ {
|
||||||
|
+ model = "Banana Pi BPI-P2-Zero";
|
||||||
|
+ compatible = "sinovoip,bpi-p2-zero", "allwinner,sun8i-h2-plus";
|
||||||
|
+
|
||||||
|
+ aliases {
|
||||||
|
+ serial0 = &uart0;
|
||||||
|
+ serial1 = &uart1;
|
||||||
|
+ ethernet0 = &emac;
|
||||||
|
+ };
|
||||||
|
+
|
||||||
|
+ chosen {
|
||||||
|
+ stdout-path = "serial0:115200n8";
|
||||||
|
+ };
|
||||||
|
+
|
||||||
|
+ connector {
|
||||||
|
+ compatible = "hdmi-connector";
|
||||||
|
+ type = "c";
|
||||||
|
+
|
||||||
|
+ port {
|
||||||
|
+ hdmi_con_in: endpoint {
|
||||||
|
+ remote-endpoint = <&hdmi_out_con>;
|
||||||
|
+ };
|
||||||
|
+ };
|
||||||
|
+ };
|
||||||
|
+
|
||||||
|
+ leds {
|
||||||
|
+ compatible = "gpio-leds";
|
||||||
|
+
|
||||||
|
+ pwr_led {
|
||||||
|
+ label = "bananapi-p2-zero:red:pwr";
|
||||||
|
+ gpios = <&r_pio 0 10 GPIO_ACTIVE_LOW>; /* PL10 */
|
||||||
|
+ default-state = "on";
|
||||||
|
+ };
|
||||||
|
+ };
|
||||||
|
+
|
||||||
|
+ gpio-keys {
|
||||||
|
+ compatible = "gpio-keys";
|
||||||
|
+
|
||||||
|
+ switch-4 {
|
||||||
|
+ label = "power";
|
||||||
|
+ linux,code = <KEY_POWER>;
|
||||||
|
+ gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>;
|
||||||
|
+ wakeup-source;
|
||||||
|
+ };
|
||||||
|
+ };
|
||||||
|
+
|
||||||
|
+ reg_vdd_cpux: vdd-cpux-regulator {
|
||||||
|
+ compatible = "regulator-gpio";
|
||||||
|
+ regulator-name = "vdd-cpux";
|
||||||
|
+ regulator-type = "voltage";
|
||||||
|
+ regulator-boot-on;
|
||||||
|
+ regulator-always-on;
|
||||||
|
+ regulator-min-microvolt = <1100000>;
|
||||||
|
+ regulator-max-microvolt = <1300000>;
|
||||||
|
+ regulator-ramp-delay = <50>; /* 4ms */
|
||||||
|
+
|
||||||
|
+ gpios = <&r_pio 0 1 GPIO_ACTIVE_HIGH>; /* PL1 */
|
||||||
|
+ enable-active-high;
|
||||||
|
+ gpios-states = <0x1>;
|
||||||
|
+ states = <1100000 0>, <1300000 1>;
|
||||||
|
+ };
|
||||||
|
+
|
||||||
|
+ reg_vcc_dram: vcc-dram {
|
||||||
|
+ compatible = "regulator-fixed";
|
||||||
|
+ regulator-name = "vcc-dram";
|
||||||
|
+ regulator-min-microvolt = <1500000>;
|
||||||
|
+ regulator-max-microvolt = <1500000>;
|
||||||
|
+ regulator-always-on;
|
||||||
|
+ regulator-boot-on;
|
||||||
|
+ enable-active-high;
|
||||||
|
+ gpio = <&r_pio 0 9 GPIO_ACTIVE_HIGH>; /* PL9 */
|
||||||
|
+ vin-supply = <®_vcc5v0>;
|
||||||
|
+ };
|
||||||
|
+
|
||||||
|
+ reg_vcc1v2: vcc1v2 {
|
||||||
|
+ compatible = "regulator-fixed";
|
||||||
|
+ regulator-name = "vcc1v2";
|
||||||
|
+ regulator-min-microvolt = <1200000>;
|
||||||
|
+ regulator-max-microvolt = <1200000>;
|
||||||
|
+ regulator-always-on;
|
||||||
|
+ regulator-boot-on;
|
||||||
|
+ enable-active-high;
|
||||||
|
+ gpio = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */
|
||||||
|
+ vin-supply = <®_vcc5v0>;
|
||||||
|
+ };
|
||||||
|
+
|
||||||
|
+ poweroff {
|
||||||
|
+ compatible = "regulator-poweroff";
|
||||||
|
+ cpu-supply = <®_vcc1v2>;
|
||||||
|
+ };
|
||||||
|
+
|
||||||
|
+ wifi_pwrseq: wifi_pwrseq {
|
||||||
|
+ compatible = "mmc-pwrseq-simple";
|
||||||
|
+ reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
|
||||||
|
+ clocks = <&rtc CLK_OSC32K_FANOUT>;
|
||||||
|
+ clock-names = "ext_clock";
|
||||||
|
+ };
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
+&cpu0 {
|
||||||
|
+ cpu-supply = <®_vdd_cpux>;
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
+&de {
|
||||||
|
+ status = "okay";
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
+&ehci0 {
|
||||||
|
+ status = "okay";
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
+&emac {
|
||||||
|
+ phy-handle = <&int_mii_phy>;
|
||||||
|
+ phy-mode = "mii";
|
||||||
|
+ allwinner,leds-active-low;
|
||||||
|
+ status = "okay";
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
+&hdmi {
|
||||||
|
+ status = "okay";
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
+&hdmi_out {
|
||||||
|
+ hdmi_out_con: endpoint {
|
||||||
|
+ remote-endpoint = <&hdmi_con_in>;
|
||||||
|
+ };
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
+&mmc0 {
|
||||||
|
+ vmmc-supply = <®_vcc3v3>;
|
||||||
|
+ bus-width = <4>;
|
||||||
|
+ /*
|
||||||
|
+ * On the production batch of this board the card detect GPIO is
|
||||||
|
+ * high active (card inserted), although on the early samples it's
|
||||||
|
+ * low active.
|
||||||
|
+ */
|
||||||
|
+ cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */
|
||||||
|
+ status = "okay";
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
+&mmc1 {
|
||||||
|
+ vmmc-supply = <®_vcc3v3>;
|
||||||
|
+ vqmmc-supply = <®_vcc3v3>;
|
||||||
|
+ mmc-pwrseq = <&wifi_pwrseq>;
|
||||||
|
+ bus-width = <4>;
|
||||||
|
+ non-removable;
|
||||||
|
+ status = "okay";
|
||||||
|
+
|
||||||
|
+ brcmf: wifi@1 {
|
||||||
|
+ reg = <1>;
|
||||||
|
+ compatible = "brcm,bcm4329-fmac";
|
||||||
|
+ interrupt-parent = <&pio>;
|
||||||
|
+ interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>; /* PG10 / EINT10 */
|
||||||
|
+ interrupt-names = "host-wake";
|
||||||
|
+ };
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
+&mmc2 {
|
||||||
|
+ pinctrl-names = "default";
|
||||||
|
+ pinctrl-0 = <&mmc2_8bit_pins>;
|
||||||
|
+ vmmc-supply = <®_vcc3v3>;
|
||||||
|
+ vqmmc-supply = <®_vcc3v3>;
|
||||||
|
+ bus-width = <8>;
|
||||||
|
+ non-removable;
|
||||||
|
+ status = "okay";
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
+&ohci0 {
|
||||||
|
+ status = "okay";
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
+&uart0 {
|
||||||
|
+ pinctrl-names = "default";
|
||||||
|
+ pinctrl-0 = <&uart0_pa_pins>;
|
||||||
|
+ status = "okay";
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
+&uart1 {
|
||||||
|
+ pinctrl-names = "default";
|
||||||
|
+ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
|
||||||
|
+ uart-has-rtscts;
|
||||||
|
+ status = "okay";
|
||||||
|
+
|
||||||
|
+ bluetooth {
|
||||||
|
+ compatible = "brcm,bcm43438-bt";
|
||||||
|
+ max-speed = <1500000>;
|
||||||
|
+ clocks = <&rtc CLK_OSC32K_FANOUT>;
|
||||||
|
+ clock-names = "lpo";
|
||||||
|
+ vbat-supply = <®_vcc3v3>;
|
||||||
|
+ vddio-supply = <®_vcc3v3>;
|
||||||
|
+ device-wakeup-gpios = <&pio 6 13 GPIO_ACTIVE_HIGH>; /* PG13 */
|
||||||
|
+ host-wakeup-gpios = <&pio 6 11 GPIO_ACTIVE_HIGH>; /* PG11 */
|
||||||
|
+ shutdown-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
|
||||||
|
+ };
|
||||||
|
+
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
+&pio {
|
||||||
|
+ gpio-line-names =
|
||||||
|
+ /* PA */
|
||||||
|
+ "CON2-P13", "CON2-P11", "CON2-P22", "CON2-P15",
|
||||||
|
+ "CON3-P03", "CON3-P02", "CON2-P07", "CON2-P29",
|
||||||
|
+ "CON2-P31", "CON2-P33", "CON2-P35", "CON2-P05",
|
||||||
|
+ "CON2-P03", "CON2-P08", "CON2-P10", "CON2-P16",
|
||||||
|
+ "CON2-P12", "CON2-P37", "CON2-P28", "CON2-P27",
|
||||||
|
+ "CON2-P40", "CON2-P38", "", "",
|
||||||
|
+ "", "", "", "", "", "", "", "",
|
||||||
|
+
|
||||||
|
+ /* PB */
|
||||||
|
+ "", "", "", "", "", "", "", "",
|
||||||
|
+ "", "", "", "", "", "", "", "",
|
||||||
|
+ "", "", "", "", "", "", "", "",
|
||||||
|
+ "", "", "", "", "", "", "", "",
|
||||||
|
+
|
||||||
|
+ /* PC */
|
||||||
|
+ "CON2-P19", "CON2-P21", "CON2-P23", "CON2-P24",
|
||||||
|
+ "CON2-P18", "", "", "CON2-P26",
|
||||||
|
+ "", "", "", "", "", "", "", "",
|
||||||
|
+ "", "", "", "", "", "", "", "",
|
||||||
|
+ "", "", "", "", "", "", "", "",
|
||||||
|
+
|
||||||
|
+ /* PD */
|
||||||
|
+ "", "", "", "", "", "", "", "",
|
||||||
|
+ "", "", "", "", "", "", "CSI-PWR-EN", "",
|
||||||
|
+ "", "", "", "", "", "", "", "",
|
||||||
|
+ "", "", "", "", "", "", "", "",
|
||||||
|
+
|
||||||
|
+ /* PE */
|
||||||
|
+ "CN3-P17", "CN3-P13", "CN3-P09", "CN3-P07",
|
||||||
|
+ "CN3-P19", "CN3-P21", "CN3-P22", "CN3-P20",
|
||||||
|
+ "CN3-P18", "CN3-P16", "CN3-P14", "CN3-P12",
|
||||||
|
+ "CN3-P05", "CN3-P03", "CN3-P06", "CN3-P08",
|
||||||
|
+ "", "", "", "", "", "", "", "",
|
||||||
|
+ "", "", "", "", "", "", "", "",
|
||||||
|
+
|
||||||
|
+ /* PF */
|
||||||
|
+ "SDC0-D1", "SDC0-D0", "SDC0-CLK", "SDC0-CMD", "SDC0-D3",
|
||||||
|
+ "SDC0-D2", "SDC0-DET", "",
|
||||||
|
+ "", "", "", "", "", "", "", "",
|
||||||
|
+ "", "", "", "", "", "", "", "",
|
||||||
|
+ "", "", "", "", "", "", "", "",
|
||||||
|
+
|
||||||
|
+ /* PG */
|
||||||
|
+ "WL-SDIO-CLK", "WL-SDIO-CMD", "WL-SDIO-D0", "WL-SDIO-D1",
|
||||||
|
+ "WL-SDIO-D2", "WL-SDIO-D3", "BT-UART-TX", "BT-UART-RX",
|
||||||
|
+ "BT-UART-RTS", "BT-UART-CTS", "WL-WAKE-AP", "BT-WAKE-AP",
|
||||||
|
+ "BT-RST-N", "AP-WAKE-BT", "", "",
|
||||||
|
+ "", "", "", "", "", "", "", "",
|
||||||
|
+ "", "", "", "", "", "", "", "";
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
+&r_pio {
|
||||||
|
+ gpio-line-names =
|
||||||
|
+ /* PL */
|
||||||
|
+ "", "CPUX-SET", "CON2-P32", "POWER-KEY", "CON2-P36",
|
||||||
|
+ "VCC-IO-EN", "USB0-ID", "WL-PWR-EN",
|
||||||
|
+ "PWR-STB", "PWR-DRAM", "PWR-LED", "IR-RX", "", "", "", "",
|
||||||
|
+ "", "", "", "", "", "", "", "",
|
||||||
|
+ "", "", "", "", "", "", "", "";
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
+&usb_otg {
|
||||||
|
+ dr_mode = "otg";
|
||||||
|
+ status = "okay";
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
+&usbphy {
|
||||||
|
+ usb0_id_det-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
|
||||||
|
+ /*
|
||||||
|
+ * There're two micro-USB connectors, one is power-only and another is
|
||||||
|
+ * OTG. The Vbus of these two connectors are connected together, so
|
||||||
|
+ * the external USB device will be powered just by the power input
|
||||||
|
+ * from the power-only USB port.
|
||||||
|
+ */
|
||||||
|
+ status = "okay";
|
||||||
|
+};
|
||||||
|
--- /dev/null
|
||||||
|
+++ b/configs/bananapi_p2_zero_defconfig
|
||||||
|
@@ -0,0 +1,10 @@
|
||||||
|
+CONFIG_ARM=y
|
||||||
|
+CONFIG_ARCH_SUNXI=y
|
||||||
|
+CONFIG_DEFAULT_DEVICE_TREE="sun8i-h2-plus-bananapi-p2-zero"
|
||||||
|
+CONFIG_SPL=y
|
||||||
|
+CONFIG_MACH_SUN8I_H3=y
|
||||||
|
+CONFIG_DRAM_CLK=408
|
||||||
|
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
|
||||||
|
+CONFIG_MMC_SUNXI_SLOT_EXTRA=2
|
||||||
|
+CONFIG_SUN8I_EMAC=y
|
||||||
|
+CONFIG_USB_EHCI_HCD=y
|
||||||
@ -1,10 +0,0 @@
|
|||||||
--- a/include/linux/types.h
|
|
||||||
+++ b/include/linux/types.h
|
|
||||||
@@ -1,6 +1,7 @@
|
|
||||||
#ifndef _LINUX_TYPES_H
|
|
||||||
#define _LINUX_TYPES_H
|
|
||||||
|
|
||||||
+typedef unsigned long long __u64;
|
|
||||||
#include <linux/posix_types.h>
|
|
||||||
#include <asm/types.h>
|
|
||||||
#include <stdbool.h>
|
|
||||||
@ -0,0 +1,30 @@
|
|||||||
|
--- a/Makefile
|
||||||
|
+++ b/Makefile
|
||||||
|
@@ -2011,26 +2011,7 @@ endif
|
||||||
|
# Check dtc and pylibfdt, if DTC is provided, else build them
|
||||||
|
PHONY += scripts_dtc
|
||||||
|
scripts_dtc: scripts_basic
|
||||||
|
- $(Q)if test "$(DTC)" = "$(DTC_INTREE)"; then \
|
||||||
|
- $(MAKE) $(build)=scripts/dtc; \
|
||||||
|
- else \
|
||||||
|
- if ! $(DTC) -v >/dev/null; then \
|
||||||
|
- echo '*** Failed to check dtc version: $(DTC)'; \
|
||||||
|
- false; \
|
||||||
|
- else \
|
||||||
|
- if test "$(call dtc-version)" -lt $(DTC_MIN_VERSION); then \
|
||||||
|
- echo '*** Your dtc is too old, please upgrade to dtc $(DTC_MIN_VERSION) or newer'; \
|
||||||
|
- false; \
|
||||||
|
- else \
|
||||||
|
- if [ -n "$(CONFIG_PYLIBFDT)" ]; then \
|
||||||
|
- if ! echo "import libfdt" | $(PYTHON3) 2>/dev/null; then \
|
||||||
|
- echo '*** pylibfdt does not seem to be available with $(PYTHON3)'; \
|
||||||
|
- false; \
|
||||||
|
- fi; \
|
||||||
|
- fi; \
|
||||||
|
- fi; \
|
||||||
|
- fi; \
|
||||||
|
- fi
|
||||||
|
+ $(MAKE) $(build)=scripts/dtc
|
||||||
|
|
||||||
|
# ---------------------------------------------------------------------------
|
||||||
|
quiet_cmd_cpp_lds = LDS $@
|
||||||
7
package/boot/uboot-sunxi/uEnv-h616.txt
Normal file
7
package/boot/uboot-sunxi/uEnv-h616.txt
Normal file
@ -0,0 +1,7 @@
|
|||||||
|
setenv mmc_rootpart 2
|
||||||
|
part uuid mmc ${mmc_bootdev}:${mmc_rootpart} uuid
|
||||||
|
setenv loadkernel fatload mmc \$mmc_bootdev \$kernel_addr_r uImage
|
||||||
|
setenv loaddtb fatload mmc \$mmc_bootdev \$fdt_addr_r dtb
|
||||||
|
setenv bootargs console=ttyS0,115200 earlyprintk root=PARTUUID=${uuid} rootwait
|
||||||
|
setenv uenvcmd run loadkernel \&\& run loaddtb \&\& booti \$kernel_addr_r - \$fdt_addr_r
|
||||||
|
run uenvcmd
|
||||||
Loading…
Reference in New Issue
Block a user