diff --git a/package/boot/uboot-rockchip/Makefile b/package/boot/uboot-rockchip/Makefile index c93ad17ee..58903f2ea 100644 --- a/package/boot/uboot-rockchip/Makefile +++ b/package/boot/uboot-rockchip/Makefile @@ -5,10 +5,10 @@ include $(TOPDIR)/rules.mk include $(INCLUDE_DIR)/kernel.mk -PKG_VERSION:=2025.01 +PKG_VERSION:=2025.04 PKG_RELEASE:=1 -PKG_HASH:=cdef7d507c93f1bbd9f015ea9bc21fa074268481405501945abc6f854d5b686f +PKG_HASH:=439d3bef296effd54130be6a731c5b118be7fddd7fcc663ccbc5fb18294d8718 PKG_MAINTAINER:=Tobias Maedel diff --git a/package/boot/uboot-rockchip/patches/110-force-pylibfdt-build.patch b/package/boot/uboot-rockchip/patches/110-force-pylibfdt-build.patch index 39aa94a0e..fcecf598d 100644 --- a/package/boot/uboot-rockchip/patches/110-force-pylibfdt-build.patch +++ b/package/boot/uboot-rockchip/patches/110-force-pylibfdt-build.patch @@ -1,6 +1,6 @@ --- a/Makefile +++ b/Makefile -@@ -2072,26 +2072,7 @@ endif +@@ -2075,26 +2075,7 @@ endif # Check dtc and pylibfdt, if DTC is provided, else build them PHONY += scripts_dtc scripts_dtc: scripts_basic diff --git a/package/boot/uboot-rockchip/patches/111-fix-mkimage-host-build.patch b/package/boot/uboot-rockchip/patches/111-fix-mkimage-host-build.patch index d04a61432..a06935f53 100644 --- a/package/boot/uboot-rockchip/patches/111-fix-mkimage-host-build.patch +++ b/package/boot/uboot-rockchip/patches/111-fix-mkimage-host-build.patch @@ -1,6 +1,6 @@ --- a/tools/image-host.c +++ b/tools/image-host.c -@@ -1162,6 +1162,7 @@ static int fit_config_add_verification_d +@@ -1175,6 +1175,7 @@ static int fit_config_add_verification_d * 2) get public key (X509_get_pubkey) * 3) provide der format (d2i_RSAPublicKey) */ @@ -8,7 +8,7 @@ static int read_pub_key(const char *keydir, const void *name, unsigned char **pubkey, int *pubkey_len) { -@@ -1215,6 +1216,13 @@ err_cert: +@@ -1228,6 +1229,13 @@ err_cert: fclose(f); return ret; } diff --git a/package/boot/uboot-rockchip/patches/317-rockchip-rk3566-Add-FriendlyARM-NanoPi-R3S.patch b/package/boot/uboot-rockchip/patches/317-rockchip-rk3566-Add-FriendlyARM-NanoPi-R3S.patch deleted file mode 100644 index f1d2f9523..000000000 --- a/package/boot/uboot-rockchip/patches/317-rockchip-rk3566-Add-FriendlyARM-NanoPi-R3S.patch +++ /dev/null @@ -1,100 +0,0 @@ ---- /dev/null -+++ b/dts/upstream/src/arm64/rockchip/rk3566-nanopi-r3s.dts -@@ -0,0 +1,9 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+ -+/dts-v1/; -+#include "rk3568-nanopi-r5s.dtsi" -+ -+/ { -+ model = "FriendlyElec NanoPi R3S"; -+ compatible = "friendlyarm,nanopi-r3s", "rockchip,rk3568"; -+}; ---- /dev/null -+++ b/configs/nanopi-r3s-rk3566_defconfig -@@ -0,0 +1,85 @@ -+CONFIG_ARM=y -+CONFIG_SKIP_LOWLEVEL_INIT=y -+CONFIG_COUNTER_FREQUENCY=24000000 -+CONFIG_ARCH_ROCKCHIP=y -+CONFIG_SPL_LIBCOMMON_SUPPORT=y -+CONFIG_SPL_LIBGENERIC_SUPPORT=y -+CONFIG_NR_DRAM_BANKS=2 -+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000 -+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3566-nanopi-r3s" -+CONFIG_ROCKCHIP_RK3568=y -+CONFIG_SYS_MALLOC_F_LEN=0x4000 -+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y -+CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y -+CONFIG_SPL_MMC=y -+CONFIG_SPL_SERIAL=y -+CONFIG_SPL_STACK_R_ADDR=0x600000 -+CONFIG_SPL_STACK=0x400000 -+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -+CONFIG_SPL_BSS_START_ADDR=0x4000000 -+CONFIG_SPL_BSS_MAX_SIZE=0x4000 -+CONFIG_SPL_STACK_R=y -+CONFIG_DEBUG_UART_BASE=0xFE660000 -+CONFIG_DEBUG_UART_CLOCK=24000000 -+CONFIG_SYS_LOAD_ADDR=0xc00800 -+CONFIG_DEBUG_UART=y -+CONFIG_FIT=y -+CONFIG_FIT_VERBOSE=y -+CONFIG_SPL_LOAD_FIT=y -+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3566-nanopi-r3s.dtb" -+# CONFIG_DISPLAY_CPUINFO is not set -+CONFIG_DISPLAY_BOARDINFO_LATE=y -+CONFIG_SPL_MAX_SIZE=0x40000 -+CONFIG_SPL_PAD_TO=0x7f8000 -+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set -+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -+CONFIG_SPL_ATF=y -+CONFIG_CMD_GPIO=y -+CONFIG_CMD_GPT=y -+CONFIG_CMD_I2C=y -+CONFIG_CMD_MMC=y -+CONFIG_CMD_USB=y -+# CONFIG_CMD_SETEXPR is not set -+CONFIG_CMD_REGULATOR=y -+# CONFIG_SPL_DOS_PARTITION is not set -+CONFIG_SPL_OF_CONTROL=y -+CONFIG_OF_LIVE=y -+CONFIG_NET_RANDOM_ETHADDR=y -+CONFIG_SPL_REGMAP=y -+CONFIG_SPL_SYSCON=y -+CONFIG_SPL_CLK=y -+CONFIG_CLK_SCMI=y -+CONFIG_ROCKCHIP_GPIO=y -+CONFIG_SYS_I2C_ROCKCHIP=y -+CONFIG_MISC=y -+CONFIG_SUPPORT_EMMC_RPMB=y -+CONFIG_MMC_DW=y -+CONFIG_MMC_DW_ROCKCHIP=y -+CONFIG_MMC_SDHCI=y -+CONFIG_MMC_SDHCI_SDMA=y -+CONFIG_MMC_SDHCI_ROCKCHIP=y -+CONFIG_ETH_DESIGNWARE=y -+CONFIG_GMAC_ROCKCHIP=y -+CONFIG_PHY_ROCKCHIP_INNO_USB2=y -+CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y -+CONFIG_DM_PMIC=y -+CONFIG_PMIC_RK8XX=y -+CONFIG_SPL_PMIC_RK8XX=y -+CONFIG_REGULATOR_PWM=y -+CONFIG_REGULATOR_RK8XX=y -+CONFIG_PWM_ROCKCHIP=y -+CONFIG_SPL_RAM=y -+CONFIG_RESET_SCMI=y -+CONFIG_BAUDRATE=1500000 -+CONFIG_DEBUG_UART_SHIFT=2 -+CONFIG_SYS_NS16550_MEM32=y -+CONFIG_SYSRESET=y -+CONFIG_USB=y -+CONFIG_USB_XHCI_HCD=y -+CONFIG_USB_XHCI_DWC3=y -+CONFIG_USB_EHCI_HCD=y -+CONFIG_USB_EHCI_GENERIC=y -+CONFIG_USB_DWC3=y -+CONFIG_USB_DWC3_GENERIC=y -+CONFIG_ERRNO_STR=y diff --git a/package/boot/uboot-rockchip/patches/400-arm64-dts-rockchip-Add-base-DT-for-rk3528-SoC.patch b/package/boot/uboot-rockchip/patches/400-arm64-dts-rockchip-Add-base-DT-for-rk3528-SoC.patch deleted file mode 100644 index 4958b3c0e..000000000 --- a/package/boot/uboot-rockchip/patches/400-arm64-dts-rockchip-Add-base-DT-for-rk3528-SoC.patch +++ /dev/null @@ -1,210 +0,0 @@ -From 7983e6c379a917c500eff31f5f9c646cc408e030 Mon Sep 17 00:00:00 2001 -From: Yao Zi -Date: Thu, 29 Aug 2024 09:27:04 +0000 -Subject: [PATCH] arm64: dts: rockchip: Add base DT for rk3528 SoC - -This initial device tree describes CPU, interrupts and UART on the chip -and is able to boot into basic kernel with only UART. Cache information -is omitted for now as there is no precise documentation. Support for -other features will be added later. - -Signed-off-by: Yao Zi -Link: https://lore.kernel.org/r/20240829092705.6241-4-ziyao@disroot.org -Signed-off-by: Heiko Stuebner ---- - arch/arm64/boot/dts/rockchip/rk3528.dtsi | 189 +++++++++++++++++++++++ - 1 file changed, 189 insertions(+) - create mode 100644 arch/arm64/boot/dts/rockchip/rk3528.dtsi - ---- /dev/null -+++ b/dts/upstream/src/arm64/rockchip/rk3528.dtsi -@@ -0,0 +1,189 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (c) 2022 Rockchip Electronics Co., Ltd. -+ * Copyright (c) 2024 Yao Zi -+ */ -+ -+#include -+#include -+ -+/ { -+ compatible = "rockchip,rk3528"; -+ -+ interrupt-parent = <&gic>; -+ #address-cells = <2>; -+ #size-cells = <2>; -+ -+ aliases { -+ serial0 = &uart0; -+ serial1 = &uart1; -+ serial2 = &uart2; -+ serial3 = &uart3; -+ serial4 = &uart4; -+ serial5 = &uart5; -+ serial6 = &uart6; -+ serial7 = &uart7; -+ }; -+ -+ cpus { -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ cpu-map { -+ cluster0 { -+ core0 { -+ cpu = <&cpu0>; -+ }; -+ core1 { -+ cpu = <&cpu1>; -+ }; -+ core2 { -+ cpu = <&cpu2>; -+ }; -+ core3 { -+ cpu = <&cpu3>; -+ }; -+ }; -+ }; -+ -+ cpu0: cpu@0 { -+ compatible = "arm,cortex-a53"; -+ reg = <0x0>; -+ device_type = "cpu"; -+ enable-method = "psci"; -+ }; -+ -+ cpu1: cpu@1 { -+ compatible = "arm,cortex-a53"; -+ reg = <0x1>; -+ device_type = "cpu"; -+ enable-method = "psci"; -+ }; -+ -+ cpu2: cpu@2 { -+ compatible = "arm,cortex-a53"; -+ reg = <0x2>; -+ device_type = "cpu"; -+ enable-method = "psci"; -+ }; -+ -+ cpu3: cpu@3 { -+ compatible = "arm,cortex-a53"; -+ reg = <0x3>; -+ device_type = "cpu"; -+ enable-method = "psci"; -+ }; -+ }; -+ -+ psci { -+ compatible = "arm,psci-1.0", "arm,psci-0.2"; -+ method = "smc"; -+ }; -+ -+ timer { -+ compatible = "arm,armv8-timer"; -+ interrupts = , -+ , -+ , -+ ; -+ }; -+ -+ xin24m: clock-xin24m { -+ compatible = "fixed-clock"; -+ clock-frequency = <24000000>; -+ clock-output-names = "xin24m"; -+ #clock-cells = <0>; -+ }; -+ -+ soc { -+ compatible = "simple-bus"; -+ ranges = <0x0 0xfe000000 0x0 0xfe000000 0x0 0x2000000>; -+ #address-cells = <2>; -+ #size-cells = <2>; -+ -+ gic: interrupt-controller@fed01000 { -+ compatible = "arm,gic-400"; -+ reg = <0x0 0xfed01000 0 0x1000>, -+ <0x0 0xfed02000 0 0x2000>, -+ <0x0 0xfed04000 0 0x2000>, -+ <0x0 0xfed06000 0 0x2000>; -+ interrupts = ; -+ interrupt-controller; -+ #address-cells = <0>; -+ #interrupt-cells = <3>; -+ }; -+ -+ uart0: serial@ff9f0000 { -+ compatible = "rockchip,rk3528-uart", "snps,dw-apb-uart"; -+ reg = <0x0 0xff9f0000 0x0 0x100>; -+ clock-frequency = <24000000>; -+ interrupts = ; -+ reg-io-width = <4>; -+ reg-shift = <2>; -+ status = "disabled"; -+ }; -+ -+ uart1: serial@ff9f8000 { -+ compatible = "rockchip,rk3528-uart", "snps,dw-apb-uart"; -+ reg = <0x0 0xff9f8000 0x0 0x100>; -+ interrupts = ; -+ reg-io-width = <4>; -+ reg-shift = <2>; -+ status = "disabled"; -+ }; -+ -+ uart2: serial@ffa00000 { -+ compatible = "rockchip,rk3528-uart", "snps,dw-apb-uart"; -+ reg = <0x0 0xffa00000 0x0 0x100>; -+ interrupts = ; -+ reg-io-width = <4>; -+ reg-shift = <2>; -+ status = "disabled"; -+ }; -+ -+ uart3: serial@ffa08000 { -+ compatible = "rockchip,rk3528-uart", "snps,dw-apb-uart"; -+ reg = <0x0 0xffa08000 0x0 0x100>; -+ reg-io-width = <4>; -+ reg-shift = <2>; -+ status = "disabled"; -+ }; -+ -+ uart4: serial@ffa10000 { -+ compatible = "rockchip,rk3528-uart", "snps,dw-apb-uart"; -+ reg = <0x0 0xffa10000 0x0 0x100>; -+ interrupts = ; -+ reg-io-width = <4>; -+ reg-shift = <2>; -+ status = "disabled"; -+ }; -+ -+ uart5: serial@ffa18000 { -+ compatible = "rockchip,rk3528-uart", "snps,dw-apb-uart"; -+ reg = <0x0 0xffa18000 0x0 0x100>; -+ interrupts = ; -+ reg-io-width = <4>; -+ reg-shift = <2>; -+ status = "disabled"; -+ }; -+ -+ uart6: serial@ffa20000 { -+ compatible = "rockchip,rk3528-uart", "snps,dw-apb-uart"; -+ reg = <0x0 0xffa20000 0x0 0x100>; -+ interrupts = ; -+ reg-io-width = <4>; -+ reg-shift = <2>; -+ status = "disabled"; -+ }; -+ -+ uart7: serial@ffa28000 { -+ compatible = "rockchip,rk3528-uart", "snps,dw-apb-uart"; -+ reg = <0x0 0xffa28000 0x0 0x100>; -+ interrupts = ; -+ reg-io-width = <4>; -+ reg-shift = <2>; -+ status = "disabled"; -+ }; -+ }; -+}; diff --git a/package/boot/uboot-rockchip/patches/402-arch-arm-rockchip-Add-initial-support-for-RK3528.patch b/package/boot/uboot-rockchip/patches/402-arch-arm-rockchip-Add-initial-support-for-RK3528.patch index 97d71c6ef..faf1c7528 100644 --- a/package/boot/uboot-rockchip/patches/402-arch-arm-rockchip-Add-initial-support-for-RK3528.patch +++ b/package/boot/uboot-rockchip/patches/402-arch-arm-rockchip-Add-initial-support-for-RK3528.patch @@ -54,7 +54,7 @@ Signed-off-by: Jonas Karlman +#endif --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig -@@ -309,6 +309,55 @@ config ROCKCHIP_RK3399 +@@ -312,6 +312,55 @@ config ROCKCHIP_RK3399 and video codec support. Peripherals include Gigabit Ethernet, USB2 host and OTG, SDIO, I2S, UARTs, SPI, I2C and PWMs. @@ -110,7 +110,7 @@ Signed-off-by: Jonas Karlman config ROCKCHIP_RK3568 bool "Support Rockchip RK3568" select ARM64 -@@ -626,6 +675,7 @@ source "arch/arm/mach-rockchip/rk3308/Kc +@@ -629,6 +678,7 @@ source "arch/arm/mach-rockchip/rk3308/Kc source "arch/arm/mach-rockchip/rk3328/Kconfig" source "arch/arm/mach-rockchip/rk3368/Kconfig" source "arch/arm/mach-rockchip/rk3399/Kconfig" diff --git a/package/boot/uboot-rockchip/patches/413-board-rockchip-Add-minimal-generic-RK3528-board.patch b/package/boot/uboot-rockchip/patches/413-board-rockchip-Add-minimal-generic-RK3528-board.patch index 041e1ec17..fc1336494 100644 --- a/package/boot/uboot-rockchip/patches/413-board-rockchip-Add-minimal-generic-RK3528-board.patch +++ b/package/boot/uboot-rockchip/patches/413-board-rockchip-Add-minimal-generic-RK3528-board.patch @@ -140,8 +140,8 @@ Signed-off-by: Jonas Karlman + * rk3566 - Anbernic RGxx3 (anbernic-rgxx3-rk3566) - - Hardkernel ODROID-M1S (odroid-m1s-rk3566) -@@ -255,6 +258,15 @@ To build rk3399 boards: + - FriendlyElec NanoPi R3S (nanopi-r3s-rk3566) +@@ -258,6 +261,15 @@ To build rk3399 boards: make evb-rk3399_defconfig make CROSS_COMPILE=aarch64-linux-gnu- diff --git a/package/boot/uboot-rockchip/patches/414-board-rockchip-Add-Radxa-E20C.patch b/package/boot/uboot-rockchip/patches/414-board-rockchip-Add-Radxa-E20C.patch index b2915dd83..16a81336a 100644 --- a/package/boot/uboot-rockchip/patches/414-board-rockchip-Add-Radxa-E20C.patch +++ b/package/boot/uboot-rockchip/patches/414-board-rockchip-Add-Radxa-E20C.patch @@ -197,28 +197,3 @@ Signed-off-by: Jonas Karlman * rk3566 - Anbernic RGxx3 (anbernic-rgxx3-rk3566) ---- /dev/null -+++ b/dts/upstream/src/arm64/rockchip/rk3528-radxa-e20c.dts -@@ -0,0 +1,22 @@ -+// SPDX-License-Identifier: GPL-2.0+ -+/* -+ * Copyright (c) 2020 Rockchip Electronics Co., Ltd -+ * Copyright (c) 2024 Radxa Limited -+ * Copyright (c) 2024 Yao Zi -+ */ -+ -+/dts-v1/; -+#include "rk3528.dtsi" -+ -+/ { -+ model = "Radxa E20C"; -+ compatible = "radxa,e20c", "rockchip,rk3528"; -+ -+ chosen { -+ stdout-path = "serial0:1500000n8"; -+ }; -+}; -+ -+&uart0 { -+ status = "okay"; -+};