From 98130cb1cb992593b050baa9c4d8484d6fd6e8f6 Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Fri, 20 Nov 2020 13:52:43 +0100
Subject: [PATCH] thermal: qcom: tsens: Add IPQ8074 support

Qualcomm IPQ807x SoC-s use tsens v2.3.0 IP, but they
only have one interrupt and not a dedicated critical interrupt.

Signed-off-by: Robert Marko <robimarko@gmail.com>
---
 drivers/thermal/qcom/tsens-v2.c | 14 ++++++++++++++
 drivers/thermal/qcom/tsens.c    | 27 ++++++++++++++++++---------
 drivers/thermal/qcom/tsens.h    |  2 +-
 3 files changed, 33 insertions(+), 10 deletions(-)

--- a/drivers/thermal/qcom/tsens-v2.c
+++ b/drivers/thermal/qcom/tsens-v2.c
@@ -36,6 +36,14 @@ static struct tsens_features tsens_v2_fe
 	.max_sensors	= 16,
 };
 
+static struct tsens_features tsens_ipq8074_feat = {
+	.ver_major	= VER_2_X,
+	.crit_int	= 0,
+	.adc		= 0,
+	.srot_split	= 1,
+	.max_sensors	= 16,
+};
+
 static const struct reg_field tsens_v2_regfields[MAX_REGFIELDS] = {
 	/* ----- SROT ------ */
 	/* VERSION */
@@ -101,6 +109,12 @@ struct tsens_plat_data data_tsens_v2 = {
 	.fields	= tsens_v2_regfields,
 };
 
+struct tsens_plat_data data_tsens_ipq8074 = {
+	.ops		= &ops_generic_v2,
+	.feat		= &tsens_ipq8074_feat,
+	.fields	= tsens_v2_regfields,
+};
+
 /* Kept around for backward compatibility with old msm8996.dtsi */
 struct tsens_plat_data data_8996 = {
 	.num_sensors	= 13,
--- a/drivers/thermal/qcom/tsens.c
+++ b/drivers/thermal/qcom/tsens.c
@@ -323,16 +323,22 @@ static int tsens_read_irq_state(struct t
 		ret = regmap_field_read(priv->rf[LOW_INT_MASK_0 + hw_id], &d->low_irq_mask);
 		if (ret)
 			return ret;
-		ret = regmap_field_read(priv->rf[CRIT_INT_CLEAR_0 + hw_id],
-					&d->crit_irq_clear);
-		if (ret)
-			return ret;
-		ret = regmap_field_read(priv->rf[CRIT_INT_MASK_0 + hw_id],
-					&d->crit_irq_mask);
-		if (ret)
-			return ret;
+		if (priv->feat->crit_int) {
+			ret = regmap_field_read(priv->rf[CRIT_INT_CLEAR_0 + hw_id],
+						&d->crit_irq_clear);
+			if (ret)
+				return ret;
+			ret = regmap_field_read(priv->rf[CRIT_INT_MASK_0 + hw_id],
+						&d->crit_irq_mask);
+			if (ret)
+				return ret;
 
-		d->crit_thresh = tsens_hw_to_mC(s, CRIT_THRESH_0 + hw_id);
+			d->crit_thresh = tsens_hw_to_mC(s, CRIT_THRESH_0 + hw_id);
+		} else {
+			d->crit_irq_clear = 0;
+			d->crit_irq_mask = 0;
+			d->crit_thresh = 0;
+		}
 	} else {
 		/* No mask register on older TSENS */
 		d->up_irq_mask = 0;
@@ -917,6 +923,9 @@ static const struct of_device_id tsens_t
 	}, {
 		.compatible = "qcom,tsens-v2",
 		.data = &data_tsens_v2,
+	}, {
+		.compatible = "qcom,ipq8074-tsens",
+		.data = &data_tsens_ipq8074,
 	},
 	{}
 };
--- a/drivers/thermal/qcom/tsens.h
+++ b/drivers/thermal/qcom/tsens.h
@@ -591,6 +591,6 @@ extern struct tsens_plat_data data_8916,
 extern struct tsens_plat_data data_tsens_v1, data_8976;
 
 /* TSENS v2 targets */
-extern struct tsens_plat_data data_8996, data_tsens_v2;
+extern struct tsens_plat_data data_8996, data_tsens_v2, data_tsens_ipq8074;
 
 #endif /* __QCOM_TSENS_H__ */