From 9467e9860e72d7351b24dc6d77f0e9fe141ce166 Mon Sep 17 00:00:00 2001 From: Robert Marko Date: Wed, 26 May 2021 16:06:32 +0200 Subject: [PATCH] PCI: qcom: Add IPQ8074 PCIe Gen3 support IPQ6018 uses the same v2.9.0 IP for the Gen3 PCIe controller. So, lets reuse that and add clocks that the IPQ6018 patch missed. Signed-off-by: Robert Marko --- drivers/pci/controller/dwc/pcie-qcom.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) --- a/drivers/pci/controller/dwc/pcie-qcom.c +++ b/drivers/pci/controller/dwc/pcie-qcom.c @@ -173,7 +173,7 @@ struct qcom_pcie_resources_2_7_0 { }; struct qcom_pcie_resources_2_9_0 { - struct clk_bulk_data clks[5]; + struct clk_bulk_data clks[7]; struct reset_control *rst; }; @@ -1279,8 +1279,10 @@ static int qcom_pcie_get_resources_2_9_0 res->clks[0].id = "iface"; res->clks[1].id = "axi_m"; res->clks[2].id = "axi_s"; - res->clks[3].id = "axi_bridge"; - res->clks[4].id = "rchng"; + res->clks[3].id = "ahb"; + res->clks[4].id = "aux"; + res->clks[5].id = "axi_bridge"; + res->clks[6].id = "rchng"; ret = devm_clk_bulk_get(dev, ARRAY_SIZE(res->clks), res->clks); if (ret < 0) @@ -1608,6 +1610,7 @@ static const struct of_device_id qcom_pc { .compatible = "qcom,pcie-qcs404", .data = &ops_2_4_0 }, { .compatible = "qcom,pcie-sdm845", .data = &ops_2_7_0 }, { .compatible = "qcom,pcie-ipq6018", .data = &ops_2_9_0 }, + { .compatible = "qcom,pcie-ipq8074-gen3", .data = &ops_2_9_0 }, { } };