Furong Xu 8563a8117b mediatek: enable sel_clk for spi-mt65xx
Without explicitly enabling sel_clk, clk_disable_unused() will disable
it when boot is done, causing CPU hang on SPI1 register access on MT7986.
Explicitly enable sel_clk to make SPI1 functional.

Signed-off-by: Furong Xu <xfr@outlook.com>
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
2022-12-17 11:22:54 +08:00
..
2022-09-17 18:22:20 +08:00
2021-06-15 17:58:07 +08:00
2021-06-15 17:58:07 +08:00
2021-06-15 17:58:07 +08:00
2022-09-13 19:25:12 +08:00
2022-01-05 19:08:23 +08:00
2021-06-15 17:58:07 +08:00
2021-06-15 17:58:07 +08:00
2021-06-15 17:58:07 +08:00
2022-12-14 18:35:35 +08:00
2022-12-14 12:00:10 +08:00
2021-06-15 17:58:07 +08:00
2022-12-14 12:10:38 +08:00
2021-06-15 17:58:07 +08:00