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Refreshed patches for qualcommb/ipq95xx by running make target/linux/refresh after creating a .config containing: CONFIG_TARGET_qualcommbe=y CONFIG_TARGET_qualcommbe_ipq95xx=y CONFIG_TARGET_qualcommbe_ipq95xx_DEVICE_qcom_rdp433=y Signed-off-by: John Audia <therealgraysky@proton.me> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
62 lines
2.5 KiB
Diff
62 lines
2.5 KiB
Diff
From ba5a61a08d83b18b99c461b4ddb9009947a4aa0e Mon Sep 17 00:00:00 2001
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From: Varadarajan Narayanan <quic_varada@quicinc.com>
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Date: Tue, 31 Oct 2023 12:41:38 +0530
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Subject: [PATCH 1/2] cpufreq: qcom-nvmem: Enable cpufreq for ipq53xx
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IPQ53xx have different OPPs available for the CPU based on
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SoC variant. This can be determined through use of an eFuse
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register present in the silicon.
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Added support for ipq53xx on nvmem driver which helps to
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determine OPPs at runtime based on the eFuse register which
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has the CPU frequency limits. opp-supported-hw dt binding
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can be used to indicate the available OPPs for each limit.
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nvmem driver also creates the "cpufreq-dt" platform_device after
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passing the version matching data to the OPP framework so that the
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cpufreq-dt handles the actual cpufreq implementation.
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Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
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Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
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Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
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Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
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[ Viresh: Fixed subject ]
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Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
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---
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drivers/cpufreq/cpufreq-dt-platdev.c | 1 +
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drivers/cpufreq/qcom-cpufreq-nvmem.c | 6 ++++++
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2 files changed, 7 insertions(+)
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--- a/drivers/cpufreq/cpufreq-dt-platdev.c
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+++ b/drivers/cpufreq/cpufreq-dt-platdev.c
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@@ -177,6 +177,7 @@ static const struct of_device_id blockli
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{ .compatible = "ti,am625", },
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{ .compatible = "ti,am62a7", },
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+ { .compatible = "qcom,ipq5332", },
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{ .compatible = "qcom,ipq8064", },
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{ .compatible = "qcom,apq8064", },
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{ .compatible = "qcom,msm8974", },
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--- a/drivers/cpufreq/qcom-cpufreq-nvmem.c
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+++ b/drivers/cpufreq/qcom-cpufreq-nvmem.c
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@@ -152,6 +152,11 @@ static int qcom_cpufreq_kryo_name_versio
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switch (msm_id) {
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case QCOM_ID_MSM8996:
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case QCOM_ID_APQ8096:
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+ case QCOM_ID_IPQ5332:
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+ case QCOM_ID_IPQ5322:
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+ case QCOM_ID_IPQ5312:
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+ case QCOM_ID_IPQ5302:
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+ case QCOM_ID_IPQ5300:
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drv->versions = 1 << (unsigned int)(*speedbin);
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break;
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case QCOM_ID_MSM8996SG:
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@@ -353,6 +358,7 @@ static const struct of_device_id qcom_cp
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{ .compatible = "qcom,apq8096", .data = &match_data_kryo },
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{ .compatible = "qcom,msm8996", .data = &match_data_kryo },
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{ .compatible = "qcom,qcs404", .data = &match_data_qcs404 },
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+ { .compatible = "qcom,ipq5332", .data = &match_data_kryo },
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{ .compatible = "qcom,ipq8064", .data = &match_data_krait },
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{ .compatible = "qcom,apq8064", .data = &match_data_krait },
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{ .compatible = "qcom,msm8974", .data = &match_data_krait },
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