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d989a3256a
Refreshed patches for qualcommb/ipq95xx by running make target/linux/refresh after creating a .config containing: CONFIG_TARGET_qualcommbe=y CONFIG_TARGET_qualcommbe_ipq95xx=y CONFIG_TARGET_qualcommbe_ipq95xx_DEVICE_qcom_rdp433=y Signed-off-by: John Audia <therealgraysky@proton.me> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
49 lines
1.5 KiB
Diff
49 lines
1.5 KiB
Diff
From 050b312654523aac9495eae3cf7bfa868fd981ce Mon Sep 17 00:00:00 2001
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From: Luo Jie <quic_luoj@quicinc.com>
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Date: Fri, 3 Jan 2025 15:31:38 +0800
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Subject: [PATCH 3/3] arm64: dts: qcom: ipq9574: Update xo_board_clk to use
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fixed factor clock
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xo_board_clk is fixed to 24 MHZ, which is routed from WiFi output clock
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48 MHZ (also being the reference clock of CMN PLL) divided 2 by analog
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block routing channel.
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Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
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Signed-off-by: Luo Jie <quic_luoj@quicinc.com>
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Link: https://lore.kernel.org/r/20250103-qcom_ipq_cmnpll-v8-5-c89fb4d4849d@quicinc.com
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Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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---
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arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi | 7 ++++++-
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arch/arm64/boot/dts/qcom/ipq9574.dtsi | 3 ++-
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2 files changed, 8 insertions(+), 2 deletions(-)
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--- a/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi
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+++ b/arch/arm64/boot/dts/qcom/ipq9574-rdp-common.dtsi
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@@ -131,8 +131,13 @@
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clock-mult = <1>;
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};
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+/*
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+ * The frequency of xo_board_clk is fixed to 24 MHZ, which is routed
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+ * from WiFi output clock 48 MHZ divided by 2.
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+ */
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&xo_board_clk {
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- clock-frequency = <24000000>;
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+ clock-div = <2>;
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+ clock-mult = <1>;
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};
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&xo_clk {
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--- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi
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+++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
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@@ -32,7 +32,8 @@
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};
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xo_board_clk: xo-board-clk {
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- compatible = "fixed-clock";
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+ compatible = "fixed-factor-clock";
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+ clocks = <&ref_48mhz_clk>;
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#clock-cells = <0>;
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};
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